Commit 37365e15 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'stm32-dt-for-v5.6-1' of... 

Merge tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.6, round 1

Highlights:
----------

MPU part:
 -Add PWM support on DK2 board.
 -Add counter support to STM32 timers.
 -Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
  connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
  extension connector on EV1 & DKx boards.
 -Add ADC support on ED1 board.
 -Update devicetree files split to better fit to STM32MP15 SOC & boards
  diversity.
 -Fix issues seen during YAML validation.
 -Enable Ethernet (MAC) TX clock gating during low-power mode.
 -Enable USB OTG HS support on DKx boards.
 -Enable USB Host EHCI on DKx boards.

MCU part:
 -Fix issues seen during YAML validation.

* tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits)
  ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval
  ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco
  ARM: dts: stm32: change nvmem node name on stm32mp1
  ARM: dts: stm32: change nvmem node name on stm32f429
  ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
  ARM: dts: stm32: fix dma controller node name on stm32mp157c
  ARM: dts: stm32: fix dma controller node name on stm32f743
  ARM: dts: stm32: fix dma controller node name on stm32f746
  ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1
  ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards
  ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx
  ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards
  ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
  ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
  ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
  ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
  ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
  ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups
  ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups
  ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity
  ...

Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 031a612b f8849332

arch/arm/boot/dts/stm32429i-eval.dts

+8 −0
Original line number Diff line number Diff line
@@ -95,6 +95,13 @@ vref: regulator-vref { 
		regulator-max-microvolt = <3300000>;

	};



	vdd_panel: vdd-panel {

		compatible = "regulator-fixed";

		regulator-name = "vdd_panel";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



	leds {

		compatible = "gpio-leds";

		green {
@@ -138,6 +145,7 @@ usbotg_hs_phy: usbphy { 


	panel_rgb: panel-rgb {

		compatible = "ampire,am-480272h3tmqw-t01h";

		power-supply = <&vdd_panel>;

		status = "okay";

		port {

			panel_in_rgb: endpoint {

arch/arm/boot/dts/stm32f4-pinctrl.dtsi

+14 −14
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ gpiok: gpio@40022800 { 
				st,bank-name = "GPIOK";

			};



			usart1_pins_a: usart1@0 {

			usart1_pins_a: usart1-0 {

				pins1 {

					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */

					bias-disable;
@@ -176,7 +176,7 @@ pins2 { 
				};

			};



			usart3_pins_a: usart3@0 {

			usart3_pins_a: usart3-0 {

				pins1 {

					pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */

					bias-disable;
@@ -189,7 +189,7 @@ pins2 { 
				};

			};



			usbotg_fs_pins_a: usbotg_fs@0 {

			usbotg_fs_pins_a: usbotg-fs-0 {

				pins {

					pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */

						 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
@@ -200,7 +200,7 @@ pins { 
				};

			};



			usbotg_fs_pins_b: usbotg_fs@1 {

			usbotg_fs_pins_b: usbotg-fs-1 {

				pins {

					pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */

						 <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
@@ -211,7 +211,7 @@ pins { 
				};

			};



			usbotg_hs_pins_a: usbotg_hs@0 {

			usbotg_hs_pins_a: usbotg-hs-0 {

				pins {

					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/

						 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -231,7 +231,7 @@ pins { 
				};

			};



			ethernet_mii: mii@0 {

			ethernet_mii: mii-0 {

				pins {

					pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */

						 <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
@@ -251,13 +251,13 @@ pins { 
				};

			};



			adc3_in8_pin: adc@200 {

			adc3_in8_pin: adc-200 {

				pins {

					pinmux = <STM32_PINMUX('F', 10, ANALOG)>;

				};

			};



			pwm1_pins: pwm@1 {

			pwm1_pins: pwm-1 {

				pins {

					pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */

						 <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
@@ -265,14 +265,14 @@ pins { 
				};

			};



			pwm3_pins: pwm@3 {

			pwm3_pins: pwm-3 {

				pins {

					pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */

						 <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */

				};

			};



			i2c1_pins: i2c1@0 {

			i2c1_pins: i2c1-0 {

				pins {

					pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */

						 <STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
@@ -282,7 +282,7 @@ pins { 
				};

			};



			ltdc_pins: ltdc@0 {

			ltdc_pins: ltdc-0 {

				pins {

					pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */

						 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
@@ -316,7 +316,7 @@ pins { 
				};

			};



			dcmi_pins: dcmi@0 {

			dcmi_pins: dcmi-0 {

				pins {

					pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */

						 <STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
@@ -339,7 +339,7 @@ pins { 
				};

			};



			sdio_pins: sdio_pins@0 {

			sdio_pins: sdio-pins-0 {

				pins {

					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */

						 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
@@ -352,7 +352,7 @@ pins { 
				};

			};



			sdio_pins_od: sdio_pins_od@0 {

			sdio_pins_od: sdio-pins-od-0 {

				pins1 {

					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */

						 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */

arch/arm/boot/dts/stm32f429.dtsi

+1 −3
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ clk_i2s_ckin: i2s-ckin { 
	};



	soc {

		romem: nvmem@1fff7800 {

		romem: efuse@1fff7800 {

			compatible = "st,stm32f4-otp";

			reg = <0x1fff7800 0x400>;

			#address-cells = <1>;
@@ -318,7 +318,6 @@ rtc: rtc@40002800 { 
			compatible = "st,stm32-rtc";

			reg = <0x40002800 0x400>;

			clocks = <&rcc 1 CLK_RTC>;

			clock-names = "ck_rtc";

			assigned-clocks = <&rcc 1 CLK_RTC>;

			assigned-clock-parents = <&rcc 1 CLK_LSE>;

			interrupt-parent = <&exti>;
@@ -789,7 +788,6 @@ dcmi: dcmi@50050000 { 
		rng: rng@50060800 {

			compatible = "st,stm32-rng";

			reg = <0x50060800 0x400>;

			interrupts = <80>;

			clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;



		};

arch/arm/boot/dts/stm32f469-disco.dts

+8 −0
Original line number Diff line number Diff line
@@ -76,6 +76,13 @@ mmc_vcard: mmc_vcard { 
		regulator-max-microvolt = <3300000>;

	};



	vdd_dsi: vdd-dsi {

		compatible = "regulator-fixed";

		regulator-name = "vdd_dsi";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



	soc {

		dma-ranges = <0xc0000000 0x0 0x10000000>;

	};
@@ -155,6 +162,7 @@ panel-dsi@0 { 
		compatible = "orisetech,otm8009a";

		reg = <0>; /* dsi virtual channel (0..3) */

		reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;

		power-supply = <&vdd_dsi>;

		status = "okay";



		port {

arch/arm/boot/dts/stm32f7-pinctrl.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ gpiok: gpio@40022800 { 
				st,bank-name = "GPIOK";

			};



			cec_pins_a: cec@0 {

			cec_pins_a: cec-0 {

				pins {

					pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */

					slew-rate = <0>;
@@ -136,7 +136,7 @@ pins { 
				};

			};



			usart1_pins_a: usart1@0 {

			usart1_pins_a: usart1-0 {

				pins1 {

					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */

					bias-disable;
@@ -149,7 +149,7 @@ pins2 { 
				};

			};



			usart1_pins_b: usart1@1 {

			usart1_pins_b: usart1-1 {

				pins1 {

					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */

					bias-disable;
@@ -162,7 +162,7 @@ pins2 { 
				};

			};



			i2c1_pins_b: i2c1@0 {

			i2c1_pins_b: i2c1-0 {

				pins {

					pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */

						 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
@@ -172,7 +172,7 @@ pins { 
				};

			};



			usbotg_hs_pins_a: usbotg-hs@0 {

			usbotg_hs_pins_a: usbotg-hs-0 {

				pins {

					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */

						 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -192,7 +192,7 @@ pins { 
				};

			};



			usbotg_hs_pins_b: usbotg-hs@1 {

			usbotg_hs_pins_b: usbotg-hs-1 {

				pins {

					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */

						 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -212,7 +212,7 @@ pins { 
				};

			};



			usbotg_fs_pins_a: usbotg-fs@0 {

			usbotg_fs_pins_a: usbotg-fs-0 {

				pins {

					pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */

						 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
@@ -223,7 +223,7 @@ pins { 
				};

			};



			sdio_pins_a: sdio_pins_a@0 {

			sdio_pins_a: sdio-pins-a-0 {

				pins {

					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */

						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
@@ -236,7 +236,7 @@ pins { 
				};

			};



			sdio_pins_od_a: sdio_pins_od_a@0 {

			sdio_pins_od_a: sdio-pins-od-a-0 {

				pins1 {

					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */

						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
@@ -254,7 +254,7 @@ pins2 { 
				};

			};



			sdio_pins_b: sdio_pins_b@0 {

			sdio_pins_b: sdio-pins-b-0 {

				pins {

					pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */

						 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
@@ -267,7 +267,7 @@ pins { 
				};

			};



			sdio_pins_od_b: sdio_pins_od_b@0 {

			sdio_pins_od_b: sdio-pins-od-b-0 {

				pins1 {

					pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */

						 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */