Commit 3a9c6f9a authored by Ilya Bakoulin's avatar Ilya Bakoulin Committed by Alex Deucher
Browse files

drm/amd/display: Speed up DML fast_validate path



[Why]
Iterating over every voltage state when we need to validate thousands of
configurations all at once (i.e. display hotplug) can take a significant
amount of time.

[How]
Check just the highest voltage state when fast_validate is true to
verify whether the configuration can work at all, then do a proper
validation including all voltage states later when fast_validate is false.

Reviewed-by: default avatarNevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: default avatarIlya Bakoulin <Ilya.Bakoulin@amd.com>
Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0bed85e4
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+2 −0
Original line number Diff line number Diff line
@@ -1603,6 +1603,7 @@ bool dcn32_internal_validate_bw(struct dc *dc,
		context->bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final =
			dm_prefetch_support_fclk_and_stutter;

		context->bw_ctx.dml.validate_max_state = fast_validate;
		vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);

		/* Last attempt with Prefetch mode 2 (dm_prefetch_support_stutter == 3) */
@@ -1611,6 +1612,7 @@ bool dcn32_internal_validate_bw(struct dc *dc,
				dm_prefetch_support_stutter;
			vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
		}
		context->bw_ctx.dml.validate_max_state = false;

		if (vlevel < context->bw_ctx.dml.soc.num_states) {
			memset(split, 0, sizeof(split));
+28 −19
Original line number Diff line number Diff line
@@ -1639,9 +1639,14 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
static void mode_support_configuration(struct vba_vars_st *v,
				  struct display_mode_lib *mode_lib)
{
	int i, j;
	int i, j, start_state;

	for (i = v->soc.num_states - 1; i >= 0; i--) {
	if (mode_lib->validate_max_state)
		start_state = v->soc.num_states - 1;
	else
		start_state = 0;

	for (i = v->soc.num_states - 1; i >= start_state; i--) {
		for (j = 0; j < 2; j++) {
			if (mode_lib->vba.ScaleRatioAndTapsSupport == true
				&& mode_lib->vba.SourceFormatPixelAndScanSupport == true
@@ -1710,7 +1715,7 @@ static void mode_support_configuration(struct vba_vars_st *v,
void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
{
	struct vba_vars_st *v = &mode_lib->vba;
	int i, j;
	int i, j, start_state;
	unsigned int k, m;
	unsigned int MaximumMPCCombine;
	unsigned int NumberOfNonCombinedSurfaceOfMaximumBandwidth;
@@ -1723,6 +1728,10 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
#endif

	/*MODE SUPPORT, VOLTAGE STATE AND SOC CONFIGURATION*/
	if (mode_lib->validate_max_state)
		start_state = v->soc.num_states - 1;
	else
		start_state = 0;

	/*Scale Ratio, taps Support Check*/

@@ -2012,7 +2021,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
	mode_lib->vba.MPCCombineMethodIncompatible = v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.MPCCombineMethodAsNeededForPStateChangeAndVoltage
			&& v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.MPCCombineMethodAsPossible;

	for (i = 0; i < v->soc.num_states; i++) {
	for (i = start_state; i < v->soc.num_states; i++) {
		for (j = 0; j < 2; j++) {
			mode_lib->vba.TotalNumberOfActiveDPP[i][j] = 0;
			mode_lib->vba.TotalAvailablePipesSupport[i][j] = true;
@@ -2289,7 +2298,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
		}
	}

	for (i = 0; i < v->soc.num_states; ++i) {
	for (i = start_state; i < v->soc.num_states; ++i) {
		mode_lib->vba.ExceededMultistreamSlots[i] = false;
		for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
			if (mode_lib->vba.OutputMultistreamEn[k] == true && mode_lib->vba.OutputMultistreamId[k] == k) {
@@ -2389,7 +2398,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
		}
	}

	for (i = 0; i < v->soc.num_states; ++i) {
	for (i = start_state; i < v->soc.num_states; ++i) {
		mode_lib->vba.DTBCLKRequiredMoreThanSupported[i] = false;
		for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
			if (mode_lib->vba.BlendingAndTiming[k] == k
@@ -2406,7 +2415,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
		}
	}

	for (i = 0; i < v->soc.num_states; ++i) {
	for (i = start_state; i < v->soc.num_states; ++i) {
		mode_lib->vba.ODMCombine2To1SupportCheckOK[i] = true;
		mode_lib->vba.ODMCombine4To1SupportCheckOK[i] = true;
		for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
@@ -2424,7 +2433,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
		}
	}

	for (i = 0; i < v->soc.num_states; i++) {
	for (i = start_state; i < v->soc.num_states; i++) {
		mode_lib->vba.DSCCLKRequiredMoreThanSupported[i] = false;
		for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
			if (mode_lib->vba.BlendingAndTiming[k] == k) {
@@ -2461,7 +2470,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
	/* Check DSC Unit and Slices Support */
	v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalDSCUnitsRequired = 0;

	for (i = 0; i < v->soc.num_states; ++i) {
	for (i = start_state; i < v->soc.num_states; ++i) {
		mode_lib->vba.NotEnoughDSCUnits[i] = false;
		mode_lib->vba.NotEnoughDSCSlices[i] = false;
		v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.TotalDSCUnitsRequired = 0;
@@ -2496,7 +2505,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
	}

	/*DSC Delay per state*/
	for (i = 0; i < v->soc.num_states; ++i) {
	for (i = start_state; i < v->soc.num_states; ++i) {
		for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
			mode_lib->vba.DSCDelayPerState[i][k] = dml32_DSCDelayRequirement(
					mode_lib->vba.RequiresDSC[i][k], mode_lib->vba.ODMCombineEnablePerState[i][k],
@@ -2523,7 +2532,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l

	//Calculate Swath, DET Configuration, DCFCLKDeepSleep
	//
	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {
			for (k = 0; k < mode_lib->vba.NumberOfActiveSurfaces; ++k) {
				mode_lib->vba.RequiredDPPCLKThisState[k] = mode_lib->vba.RequiredDPPCLK[i][j][k];
@@ -2661,7 +2670,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
			mode_lib->vba.SurfaceSizeInMALL,
			&mode_lib->vba.ExceededMALLSize);

	for (i = 0; i < v->soc.num_states; i++) {
	for (i = start_state; i < v->soc.num_states; i++) {
		for (j = 0; j < 2; j++) {
			for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
				mode_lib->vba.swath_width_luma_ub_this_state[k] =
@@ -2888,7 +2897,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
	}

	//Calculate Return BW
	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {
			for (k = 0; k <= mode_lib->vba.NumberOfActiveSurfaces - 1; k++) {
				if (mode_lib->vba.BlendingAndTiming[k] == k) {
@@ -2967,7 +2976,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
			&mode_lib->vba.MinPrefetchMode,
			&mode_lib->vba.MaxPrefetchMode);

	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j)
			mode_lib->vba.DCFCLKState[i][j] = mode_lib->vba.DCFCLKPerState[i];
	}
@@ -3089,7 +3098,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
				mode_lib->vba.DCFCLKState);
	} // UseMinimumRequiredDCFCLK == true

	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {
			mode_lib->vba.ReturnBWPerState[i][j] = dml32_get_return_bw_mbps(&mode_lib->vba.soc, i,
					mode_lib->vba.HostVMEnable, mode_lib->vba.DCFCLKState[i][j],
@@ -3098,7 +3107,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
	}

	//Re-ordering Buffer Support Check
	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {
			if ((mode_lib->vba.ROBBufferSizeInKByte - mode_lib->vba.PixelChunkSizeInKByte) * 1024
					/ mode_lib->vba.ReturnBWPerState[i][j]
@@ -3120,7 +3129,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
				+ mode_lib->vba.ReadBandwidthChroma[k];
	}

	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {
			mode_lib->vba.MaxTotalVerticalActiveAvailableBandwidth[i][j] =
				dml_min3(mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLKState[i][j]
@@ -3144,7 +3153,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l

	/* Prefetch Check */

	for (i = 0; i < (int) v->soc.num_states; ++i) {
	for (i = start_state; i < (int) v->soc.num_states; ++i) {
		for (j = 0; j <= 1; ++j) {

			mode_lib->vba.TimeCalc = 24 / mode_lib->vba.ProjectedDCFCLKDeepSleep[i][j];
@@ -3662,7 +3671,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l

	MaximumMPCCombine = 0;

	for (i = v->soc.num_states; i >= 0; i--) {
	for (i = v->soc.num_states; i >= start_state; i--) {
		if (i == v->soc.num_states || mode_lib->vba.ModeSupport[i][0] == true ||
				mode_lib->vba.ModeSupport[i][1] == true) {
			mode_lib->vba.VoltageLevel = i;
+1 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ struct display_mode_lib {
	struct dal_logger *logger;
	struct dml_funcs funcs;
	struct _vcs_dpi_display_e2e_pipe_params_st dml_pipe_state[6];
	bool validate_max_state;
};

void dml_init_instance(struct display_mode_lib *lib,