Loading arch/sh/drivers/pci/fixups-sh7785lcr.c +17 −16 Original line number Diff line number Diff line Loading @@ -15,32 +15,33 @@ #include <linux/pci.h> #include "pci-sh4.h" int pci_fixup_pcic(void) int pci_fixup_pcic(struct pci_channel *chan) { pci_write_reg(0x000043ff, SH4_PCIINTM); pci_write_reg(0x0000380f, SH4_PCIAINTM); pci_write_reg(chan, 0x000043ff, SH4_PCIINTM); pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); pci_write_reg(0xfbb00047, SH7780_PCICMD); pci_write_reg(0x00000000, SH7780_PCIIBAR); pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD); pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR); pci_write_reg(0x00011912, SH7780_PCISVID); pci_write_reg(0x08000000, SH7780_PCICSCR0); pci_write_reg(0x0000001b, SH7780_PCICSAR0); pci_write_reg(0xfd000000, SH7780_PCICSCR1); pci_write_reg(0x0000000f, SH7780_PCICSAR1); pci_write_reg(chan, 0x00011912, SH7780_PCISVID); pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0); pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0); pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1); pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1); pci_write_reg(0xfd000000, SH7780_PCIMBR0); pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0); pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0); #ifdef CONFIG_32BIT pci_write_reg(0xc0000000, SH7780_PCIMBR2); pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2); pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); #endif /* Set IOBR for windows containing area specified in pci.h */ pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE - 1), SH7780_PCIIOBR); pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); pci_write_reg(chan, ((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); return 0; } arch/sh/drivers/pci/ops-sh7785lcr.c +2 −2 Original line number Diff line number Diff line Loading @@ -41,7 +41,7 @@ static struct resource sh7785_mem_resource = { }; struct pci_channel board_pci_channels[] = { { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, { sh7780_pci_init, &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; Loading @@ -61,5 +61,5 @@ static struct sh4_pci_address_map sh7785_pci_map = { int __init pcibios_init_platform(void) { return sh7780_pcic_init(&sh7785_pci_map); return sh7780_pcic_init(&board_pci_channels[0], &sh7785_pci_map); } Loading
arch/sh/drivers/pci/fixups-sh7785lcr.c +17 −16 Original line number Diff line number Diff line Loading @@ -15,32 +15,33 @@ #include <linux/pci.h> #include "pci-sh4.h" int pci_fixup_pcic(void) int pci_fixup_pcic(struct pci_channel *chan) { pci_write_reg(0x000043ff, SH4_PCIINTM); pci_write_reg(0x0000380f, SH4_PCIAINTM); pci_write_reg(chan, 0x000043ff, SH4_PCIINTM); pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); pci_write_reg(0xfbb00047, SH7780_PCICMD); pci_write_reg(0x00000000, SH7780_PCIIBAR); pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD); pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR); pci_write_reg(0x00011912, SH7780_PCISVID); pci_write_reg(0x08000000, SH7780_PCICSCR0); pci_write_reg(0x0000001b, SH7780_PCICSAR0); pci_write_reg(0xfd000000, SH7780_PCICSCR1); pci_write_reg(0x0000000f, SH7780_PCICSAR1); pci_write_reg(chan, 0x00011912, SH7780_PCISVID); pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0); pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0); pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1); pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1); pci_write_reg(0xfd000000, SH7780_PCIMBR0); pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0); pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0); #ifdef CONFIG_32BIT pci_write_reg(0xc0000000, SH7780_PCIMBR2); pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2); pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); #endif /* Set IOBR for windows containing area specified in pci.h */ pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE - 1), SH7780_PCIIOBR); pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); pci_write_reg(chan, ((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); return 0; }
arch/sh/drivers/pci/ops-sh7785lcr.c +2 −2 Original line number Diff line number Diff line Loading @@ -41,7 +41,7 @@ static struct resource sh7785_mem_resource = { }; struct pci_channel board_pci_channels[] = { { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, { sh7780_pci_init, &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, { NULL, NULL, NULL, 0, 0 }, }; Loading @@ -61,5 +61,5 @@ static struct sh4_pci_address_map sh7785_pci_map = { int __init pcibios_init_platform(void) { return sh7780_pcic_init(&sh7785_pci_map); return sh7780_pcic_init(&board_pci_channels[0], &sh7785_pci_map); }