Skip to content
Commit 3b5a7ca7 authored by Clément Léger's avatar Clément Léger Committed by Claudiu Beznea
Browse files

ARM: at91: setup outer cache .write_sec() callback if needed



When running under OP-TEE, the L2 cache is configured by OP-TEE and the
sam platform code does not allow any modification yet. Setup a dummy
.write_sec() callback to avoid triggering exceptions when Linux tries
to modify the L2 cache configuration.

Signed-off-by: default avatarClément Léger <clement.leger@bootlin.com>
[claudiu.beznea: keep .init_early populated only for SAMA5D2, remove
 sam_secure_init() from sama5d2_init() as it is also called in
 sama5_secure_cache_init()]
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220606145701.185552-3-clement.leger@bootlin.com
parent c71572aa
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment