Loading arch/mips/jazz/irq.c +16 −11 Original line number Original line Diff line number Diff line Loading @@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void) if (pending & IE_IRQ4) { if (pending & IE_IRQ4) { r4030_read_reg32(JAZZ_TIMER_REGISTER); r4030_read_reg32(JAZZ_TIMER_REGISTER); do_IRQ(JAZZ_TIMER_IRQ); do_IRQ(JAZZ_TIMER_IRQ); } else if (pending & IE_IRQ2) } else if (pending & IE_IRQ2) { do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK; else if (pending & IE_IRQ1) { do_IRQ(irq); } else if (pending & IE_IRQ1) { irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; if (likely(irq > 0)) if (likely(irq > 0)) do_IRQ(irq + JAZZ_IRQ_START - 1); do_IRQ(irq + JAZZ_IRQ_START - 1); Loading @@ -117,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode, struct clock_event_device r4030_clockevent = { struct clock_event_device r4030_clockevent = { .name = "r4030", .name = "r4030", .features = CLOCK_EVT_FEAT_PERIODIC, .features = CLOCK_EVT_FEAT_PERIODIC, .rating = 100, .rating = 300, .irq = JAZZ_TIMER_IRQ, .irq = JAZZ_TIMER_IRQ, .cpumask = CPU_MASK_CPU0, .set_mode = r4030_set_mode, .set_mode = r4030_set_mode, }; }; static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) { { r4030_clockevent.event_handler(&r4030_clockevent); struct clock_event_device *cd = dev_id; cd->event_handler(cd); return IRQ_HANDLED; return IRQ_HANDLED; } } Loading @@ -134,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = { .handler = r4030_timer_interrupt, .handler = r4030_timer_interrupt, .flags = IRQF_DISABLED, .flags = IRQF_DISABLED, .mask = CPU_MASK_CPU0, .mask = CPU_MASK_CPU0, .name = "timer", .name = "R4030 timer", }; }; void __init plat_time_init(void) void __init plat_time_init(void) { { struct irqaction *irq = &r4030_timer_irqaction; struct clock_event_device *cd = &r4030_clockevent; struct irqaction *action = &r4030_timer_irqaction; unsigned int cpu = smp_processor_id(); BUG_ON(HZ != 100); BUG_ON(HZ != 100); cd->cpumask = cpumask_of_cpu(cpu); clockevents_register_device(cd); action->dev_id = cd; setup_irq(JAZZ_TIMER_IRQ, action); /* /* * Set clock to 100Hz. * Set clock to 100Hz. * * Loading @@ -150,8 +158,5 @@ void __init plat_time_init(void) * a programmable 4-bit divider. This makes it fairly inflexible. * a programmable 4-bit divider. This makes it fairly inflexible. */ */ r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); setup_irq(JAZZ_TIMER_IRQ, irq); clockevents_register_device(&r4030_clockevent); setup_pit_timer(); setup_pit_timer(); } } Loading
arch/mips/jazz/irq.c +16 −11 Original line number Original line Diff line number Diff line Loading @@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void) if (pending & IE_IRQ4) { if (pending & IE_IRQ4) { r4030_read_reg32(JAZZ_TIMER_REGISTER); r4030_read_reg32(JAZZ_TIMER_REGISTER); do_IRQ(JAZZ_TIMER_IRQ); do_IRQ(JAZZ_TIMER_IRQ); } else if (pending & IE_IRQ2) } else if (pending & IE_IRQ2) { do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK)); irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK; else if (pending & IE_IRQ1) { do_IRQ(irq); } else if (pending & IE_IRQ1) { irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; if (likely(irq > 0)) if (likely(irq > 0)) do_IRQ(irq + JAZZ_IRQ_START - 1); do_IRQ(irq + JAZZ_IRQ_START - 1); Loading @@ -117,16 +118,16 @@ static void r4030_set_mode(enum clock_event_mode mode, struct clock_event_device r4030_clockevent = { struct clock_event_device r4030_clockevent = { .name = "r4030", .name = "r4030", .features = CLOCK_EVT_FEAT_PERIODIC, .features = CLOCK_EVT_FEAT_PERIODIC, .rating = 100, .rating = 300, .irq = JAZZ_TIMER_IRQ, .irq = JAZZ_TIMER_IRQ, .cpumask = CPU_MASK_CPU0, .set_mode = r4030_set_mode, .set_mode = r4030_set_mode, }; }; static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) { { r4030_clockevent.event_handler(&r4030_clockevent); struct clock_event_device *cd = dev_id; cd->event_handler(cd); return IRQ_HANDLED; return IRQ_HANDLED; } } Loading @@ -134,15 +135,22 @@ static struct irqaction r4030_timer_irqaction = { .handler = r4030_timer_interrupt, .handler = r4030_timer_interrupt, .flags = IRQF_DISABLED, .flags = IRQF_DISABLED, .mask = CPU_MASK_CPU0, .mask = CPU_MASK_CPU0, .name = "timer", .name = "R4030 timer", }; }; void __init plat_time_init(void) void __init plat_time_init(void) { { struct irqaction *irq = &r4030_timer_irqaction; struct clock_event_device *cd = &r4030_clockevent; struct irqaction *action = &r4030_timer_irqaction; unsigned int cpu = smp_processor_id(); BUG_ON(HZ != 100); BUG_ON(HZ != 100); cd->cpumask = cpumask_of_cpu(cpu); clockevents_register_device(cd); action->dev_id = cd; setup_irq(JAZZ_TIMER_IRQ, action); /* /* * Set clock to 100Hz. * Set clock to 100Hz. * * Loading @@ -150,8 +158,5 @@ void __init plat_time_init(void) * a programmable 4-bit divider. This makes it fairly inflexible. * a programmable 4-bit divider. This makes it fairly inflexible. */ */ r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); setup_irq(JAZZ_TIMER_IRQ, irq); clockevents_register_device(&r4030_clockevent); setup_pit_timer(); setup_pit_timer(); } }