Commit 3c882de5 authored by Rene Sapiens's avatar Rene Sapiens Committed by Omar Ramirez Luna
Browse files

staging: tidspbridge: set3 remove hungarian from structs 



hungarian notation will be removed from the elements inside
structures, the next varibles will be renamed:

Original:               Replacement:
dw_seg_base_va          seg_base_va
dw_self_loop            self_loop
dw_state                state
dw_tc_endianism         tc_endianism
dw_test_base            test_base
dw_type                 type
dw_val1                 val1
dw_val2                 val2
dw_val3                 val3
dw_va                   va
dw_virt_base            virt_base
dw_vm_base              vm_base
dw_vm_size              vm_size
pfn_allocate            allocate
pfn_brd_mem_copy        brd_mem_copy
pfn_brd_mem_map         brd_mem_map
pfn_brd_mem_un_map      brd_mem_un_map
pfn_brd_mem_write       brd_mem_write
pfn_brd_monitor         brd_monitor
pfn_brd_read            brd_read

Signed-off-by: default avatarRene Sapiens <rene.sapiens@ti.com>
Signed-off-by: default avatarOmar Ramirez Luna <omar.ramirez@ti.com>
parent 5108de0a

drivers/staging/tidspbridge/core/_tiomap.h

+3 −3
Original line number Diff line number Diff line
@@ -332,9 +332,9 @@ struct bridge_dev_context { 
	u32 dsp_clk_m2_base;	/* DSP Clock Module m2 */

	u32 public_rhea;	/* Pub Rhea */

	u32 int_addr;		/* MB INTR reg */

	u32 dw_tc_endianism;	/* TC Endianism register */

	u32 dw_test_base;	/* DSP MMU Mapped registers */

	u32 dw_self_loop;	/* Pointer to the selfloop */

	u32 tc_endianism;	/* TC Endianism register */

	u32 test_base;		/* DSP MMU Mapped registers */

	u32 self_loop;		/* Pointer to the selfloop */

	u32 dsp_start_add;	/* API Boot vector */

	u32 internal_size;	/* Internal memory size */

drivers/staging/tidspbridge/core/chnl_sm.c

+11 −11
Original line number Diff line number Diff line
@@ -115,7 +115,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf, 
	 * Check the channel state: only queue chirp if channel state

	 * allows it.

	 */

	dw_state = pchnl->dw_state;

	dw_state = pchnl->state;

	if (dw_state != CHNL_STATEREADY) {

		if (dw_state & CHNL_STATECANCEL)

			return -ECANCELED;
@@ -207,7 +207,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf, 
	 * more IOR's.

	 */

	if (is_eos)

		pchnl->dw_state |= CHNL_STATEEOS;

		pchnl->state |= CHNL_STATEEOS;



	/* Legacy DSM Processor-Copy */

	DBC_ASSERT(pchnl->chnl_type == CHNL_PCPY);
@@ -258,7 +258,7 @@ int bridge_chnl_cancel_io(struct chnl_object *chnl_obj) 
	 *  IORequests or dispatching. */

	spin_lock_bh(&chnl_mgr_obj->chnl_mgr_lock);



	pchnl->dw_state |= CHNL_STATECANCEL;

	pchnl->state |= CHNL_STATECANCEL;



	if (list_empty(&pchnl->pio_requests)) {

		spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);
@@ -312,7 +312,7 @@ int bridge_chnl_close(struct chnl_object *chnl_obj) 
	if (status)

		return status;

	/* Assert I/O on this channel is now cancelled: Protects from io_dpc */

	DBC_ASSERT((pchnl->dw_state & CHNL_STATECANCEL));

	DBC_ASSERT((pchnl->state & CHNL_STATECANCEL));

	/* Invalidate channel object: Protects from CHNL_GetIOCompletion() */

	/* Free the slot in the channel manager: */

	pchnl->chnl_mgr_obj->ap_channel[pchnl->chnl_id] = NULL;
@@ -381,7 +381,7 @@ int bridge_chnl_create(struct chnl_mgr **channel_mgr, 
						* max_channels, GFP_KERNEL);

		if (chnl_mgr_obj->ap_channel) {

			/* Initialize chnl_mgr object */

			chnl_mgr_obj->dw_type = CHNL_TYPESM;

			chnl_mgr_obj->type = CHNL_TYPESM;

			chnl_mgr_obj->word_size = mgr_attrts->word_size;

			/* Total # chnls supported */

			chnl_mgr_obj->max_channels = max_channels;
@@ -488,7 +488,7 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 timeout) 
		} else {

			status = bridge_chnl_cancel_io(chnl_obj);

			/* Now, leave the channel in the ready state: */

			pchnl->dw_state &= ~CHNL_STATECANCEL;

			pchnl->state &= ~CHNL_STATECANCEL;

		}

	}

	DBC_ENSURE(status || list_empty(&pchnl->pio_requests));
@@ -517,7 +517,7 @@ int bridge_chnl_get_info(struct chnl_object *chnl_obj, 
			channel_info->sync_event = pchnl->sync_event;

			channel_info->cio_cs = pchnl->cio_cs;

			channel_info->cio_reqs = pchnl->cio_reqs;

			channel_info->dw_state = pchnl->dw_state;

			channel_info->state = pchnl->state;

		} else {

			status = -EFAULT;

		}
@@ -687,7 +687,7 @@ int bridge_chnl_get_mgr_info(struct chnl_mgr *hchnl_mgr, u32 ch_id, 
	/* Return the requested information: */

	mgr_info->chnl_obj = chnl_mgr_obj->ap_channel[ch_id];

	mgr_info->open_channels = chnl_mgr_obj->open_channels;

	mgr_info->dw_type = chnl_mgr_obj->dw_type;

	mgr_info->type = chnl_mgr_obj->type;

	/* total # of chnls */

	mgr_info->max_channels = chnl_mgr_obj->max_channels;
@@ -718,7 +718,7 @@ int bridge_chnl_idle(struct chnl_object *chnl_obj, u32 timeout, 


		/* Reset the byte count and put channel back in ready state. */

		chnl_obj->bytes_moved = 0;

		chnl_obj->dw_state &= ~CHNL_STATECANCEL;

		chnl_obj->state &= ~CHNL_STATECANCEL;

	}



	return status;
@@ -769,7 +769,7 @@ int bridge_chnl_open(struct chnl_object **chnl, 
		return -ENOMEM;



	/* Protect queues from io_dpc: */

	pchnl->dw_state = CHNL_STATECANCEL;

	pchnl->state = CHNL_STATECANCEL;



	/* Allocate initial IOR and IOC queues: */

	status = create_chirp_list(&pchnl->free_packets_list,
@@ -817,7 +817,7 @@ int bridge_chnl_open(struct chnl_object **chnl, 
	chnl_mgr_obj->open_channels++;

	spin_unlock_bh(&chnl_mgr_obj->chnl_mgr_lock);

	/* Return result... */

	pchnl->dw_state = CHNL_STATEREADY;

	pchnl->state = CHNL_STATEREADY;

	*chnl = pchnl;



	return status;

drivers/staging/tidspbridge/core/io_sm.c

+17 −17
Original line number Diff line number Diff line
@@ -483,7 +483,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) 
							      1)) == 0)) {

				status =

				    hio_mgr->intf_fxns->

				    pfn_brd_mem_map(hio_mgr->hbridge_context,

				    brd_mem_map(hio_mgr->hbridge_context,

						    pa_curr, va_curr,

						    page_size[i], map_attrs,

						    NULL);
@@ -549,7 +549,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) 
			} else {

				status =

				    hio_mgr->intf_fxns->

				    pfn_brd_mem_map(hio_mgr->hbridge_context,

				    brd_mem_map(hio_mgr->hbridge_context,

						    pa_curr, va_curr,

						    page_size[i], map_attrs,

						    NULL);
@@ -615,7 +615,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) 
					ae_proc[ndx].ul_dsp_va);

				ndx++;

			} else {

				status = hio_mgr->intf_fxns->pfn_brd_mem_map

				status = hio_mgr->intf_fxns->brd_mem_map

				    (hio_mgr->hbridge_context,

				     hio_mgr->ext_proc_info.ty_tlb[i].

				     ul_gpp_phys,
@@ -637,7 +637,7 @@ int bridge_io_on_loaded(struct io_mgr *hio_mgr) 
	/* Map the L4 peripherals */

	i = 0;

	while (l4_peripheral_table[i].phys_addr) {

		status = hio_mgr->intf_fxns->pfn_brd_mem_map

		status = hio_mgr->intf_fxns->brd_mem_map

		    (hio_mgr->hbridge_context, l4_peripheral_table[i].phys_addr,

		     l4_peripheral_table[i].dsp_virt_addr, HW_PAGE_SIZE4KB,

		     map_attrs, NULL);
@@ -977,8 +977,8 @@ void io_request_chnl(struct io_mgr *io_manager, struct chnl_object *pchnl, 
		 * Assertion fires if CHNL_AddIOReq() called on a stream

		 * which was cancelled, or attached to a dead board.

		 */

		DBC_ASSERT((pchnl->dw_state == CHNL_STATEREADY) ||

			   (pchnl->dw_state == CHNL_STATEEOS));

		DBC_ASSERT((pchnl->state == CHNL_STATEREADY) ||

			   (pchnl->state == CHNL_STATEEOS));

		/* Indicate to the DSP we have a buffer available for input */

		set_chnl_busy(sm, pchnl->chnl_id);

		*mbx_val = MBX_PCPY_CLASS;
@@ -987,7 +987,7 @@ void io_request_chnl(struct io_mgr *io_manager, struct chnl_object *pchnl, 
		 * This assertion fails if CHNL_AddIOReq() was called on a

		 * stream which was cancelled, or attached to a dead board.

		 */

		DBC_ASSERT((pchnl->dw_state & ~CHNL_STATEEOS) ==

		DBC_ASSERT((pchnl->state & ~CHNL_STATEEOS) ==

			   CHNL_STATEREADY);

		/*

		 * Record the fact that we have a buffer available for
@@ -1092,7 +1092,7 @@ static void input_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl, 
	}

	pchnl = chnl_mgr_obj->ap_channel[chnl_id];

	if ((pchnl != NULL) && CHNL_IS_INPUT(pchnl->chnl_mode)) {

		if ((pchnl->dw_state & ~CHNL_STATEEOS) == CHNL_STATEREADY) {

		if ((pchnl->state & ~CHNL_STATEEOS) == CHNL_STATEREADY) {

			/* Get the I/O request, and attempt a transfer */

			if (!list_empty(&pchnl->pio_requests)) {

				if (!pchnl->cio_reqs)
@@ -1122,7 +1122,7 @@ static void input_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl, 
					 * sends EOS more than once on this

					 * channel.

					 */

					if (pchnl->dw_state & CHNL_STATEEOS)

					if (pchnl->state & CHNL_STATEEOS)

						goto func_end;

					/*

					 * Zero bytes indicates EOS. Update
@@ -1131,7 +1131,7 @@ static void input_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl, 
					 */

					chnl_packet_obj->status |=

						CHNL_IOCSTATEOS;

					pchnl->dw_state |= CHNL_STATEEOS;

					pchnl->state |= CHNL_STATEEOS;

					/*

					 * Notify that end of stream has

					 * occurred.
@@ -1329,7 +1329,7 @@ static void output_chnl(struct io_mgr *pio_mgr, struct chnl_object *pchnl, 
	if (sm->output_full)

		goto func_end;



	if (pchnl && !((pchnl->dw_state & ~CHNL_STATEEOS) == CHNL_STATEREADY))

	if (pchnl && !((pchnl->state & ~CHNL_STATEEOS) == CHNL_STATEREADY))

		goto func_end;



	/* Look to see if both a PC and DSP output channel are ready */
@@ -1810,7 +1810,7 @@ int print_dsp_trace_buffer(struct bridge_dev_context *hbridge_context) 
	psz_buf = kzalloc(ul_num_bytes + 2, GFP_ATOMIC);

	if (psz_buf != NULL) {

		/* Read trace buffer data */

		status = (*intf_fxns->pfn_brd_read)(pbridge_context,

		status = (*intf_fxns->brd_read)(pbridge_context,

			(u8 *)psz_buf, (u32)ul_trace_begin,

			ul_num_bytes, 0);
@@ -1825,7 +1825,7 @@ int print_dsp_trace_buffer(struct bridge_dev_context *hbridge_context) 
			__func__, psz_buf);



		/* Read the value at the DSP address in trace_cur_pos. */

		status = (*intf_fxns->pfn_brd_read)(pbridge_context,

		status = (*intf_fxns->brd_read)(pbridge_context,

				(u8 *)&trace_cur_pos, (u32)trace_cur_pos,

				4, 0);

		if (status)
@@ -1992,7 +1992,7 @@ int dump_dsp_stack(struct bridge_dev_context *bridge_context) 
			poll_cnt < POLL_MAX) {



			/* Read DSP dump size from the DSP trace buffer... */

			status = (*intf_fxns->pfn_brd_read)(bridge_context,

			status = (*intf_fxns->brd_read)(bridge_context,

				(u8 *)&mmu_fault_dbg_info, (u32)trace_begin,

				sizeof(mmu_fault_dbg_info), 0);
@@ -2028,7 +2028,7 @@ int dump_dsp_stack(struct bridge_dev_context *bridge_context) 
		buffer_end =  buffer + total_size / 4;



		/* Read bytes from the DSP trace buffer... */

		status = (*intf_fxns->pfn_brd_read)(bridge_context,

		status = (*intf_fxns->brd_read)(bridge_context,

				(u8 *)buffer, (u32)trace_begin,

				total_size, 0);

		if (status) {
@@ -2189,7 +2189,7 @@ void dump_dl_modules(struct bridge_dev_context *bridge_context) 
	pr_debug("%s: _DLModules at 0x%x\n", __func__, module_dsp_addr);



	/* Copy the modules_header structure from DSP memory. */

	status = (*intf_fxns->pfn_brd_read)(bridge_context, (u8 *) &modules_hdr,

	status = (*intf_fxns->brd_read)(bridge_context, (u8 *) &modules_hdr,

				(u32) module_dsp_addr, sizeof(modules_hdr), 0);



	if (status) {
@@ -2224,7 +2224,7 @@ void dump_dl_modules(struct bridge_dev_context *bridge_context) 
				goto func_end;

		}

		/* Copy the dll_module structure from DSP memory */

		status = (*intf_fxns->pfn_brd_read)(bridge_context,

		status = (*intf_fxns->brd_read)(bridge_context,

			(u8 *)module_struct, module_dsp_addr, module_size, 0);



		if (status) {

drivers/staging/tidspbridge/core/tiomap3430.c

+1 −1
Original line number Diff line number Diff line
@@ -765,7 +765,7 @@ static int bridge_dev_create(struct bridge_dev_context 
	}



	dev_context->dsp_start_add = (u32) OMAP_GEM_BASE;

	dev_context->dw_self_loop = (u32) NULL;

	dev_context->self_loop = (u32) NULL;

	dev_context->dsp_per_clks = 0;

	dev_context->internal_size = OMAP_DSP_SIZE;

	/*  Clear dev context MMU table entries.

drivers/staging/tidspbridge/include/dspbridge/_chnl_sm.h

+2 −2
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ struct chnl_mgr { 
	u8 max_channels;	/* Total number of channels */

	u8 open_channels;	/* Total number of open channels */

	struct chnl_object **ap_channel;	/* Array of channels */

	u8 dw_type;		/* Type of channel class library */

	u8 type;		/* Type of channel class library */

	/* If no shm syms, return for CHNL_Open */

	int chnl_open_status;

};
@@ -140,7 +140,7 @@ struct chnl_object { 
	/* Pointer back to channel manager */

	struct chnl_mgr *chnl_mgr_obj;

	u32 chnl_id;		/* Channel id */

	u8 dw_state;		/* Current channel state */

	u8 state;		/* Current channel state */

	s8 chnl_mode;		/* Chnl mode and attributes */

	/* Chnl I/O completion event (user mode) */

	void *user_event;