Commit 3cbcfece authored by Dien Pham's avatar Dien Pham Committed by Geert Uytterhoeven
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arm64: dts: r8a7796: Add cpuidle support for CA53 cores 



Enable cpuidle (core shutdown) support for R-Car M3-W CA53 cores.

Signed-off-by: default avatarDien Pham <dien.pham.ry@renesas.com>
Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/1547808474-19427-5-git-send-email-uli+renesas@fpond.eu


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 824a88b5

arch/arm64/boot/dts/renesas/r8a7796.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -189,6 +189,7 @@ a53_0: cpu@100 { 
			power-domains = <&sysc R8A7796_PD_CA53_CPU0>;

			next-level-cache = <&L2_CA53>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_1>;

			#cooling-cells = <2>;

			dynamic-power-coefficient = <277>;

			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
@@ -203,6 +204,7 @@ a53_1: cpu@101 { 
			power-domains = <&sysc R8A7796_PD_CA53_CPU1>;

			next-level-cache = <&L2_CA53>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_1>;

			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;

			operating-points-v2 = <&cluster1_opp>;

			capacity-dmips-mhz = <535>;
@@ -215,6 +217,7 @@ a53_2: cpu@102 { 
			power-domains = <&sysc R8A7796_PD_CA53_CPU2>;

			next-level-cache = <&L2_CA53>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_1>;

			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;

			operating-points-v2 = <&cluster1_opp>;

			capacity-dmips-mhz = <535>;
@@ -227,6 +230,7 @@ a53_3: cpu@103 { 
			power-domains = <&sysc R8A7796_PD_CA53_CPU3>;

			next-level-cache = <&L2_CA53>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SLEEP_1>;

			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;

			operating-points-v2 = <&cluster1_opp>;

			capacity-dmips-mhz = <535>;
@@ -257,6 +261,15 @@ CPU_SLEEP_0: cpu-sleep-0 { 
				exit-latency-us = <500>;

				min-residency-us = <4000>;

			};



			CPU_SLEEP_1: cpu-sleep-1 {

				compatible = "arm,idle-state";

				arm,psci-suspend-param = <0x0010000>;

				local-timer-stop;

				entry-latency-us = <700>;

				exit-latency-us = <700>;

				min-residency-us = <5000>;

			};

		};

	};