Commit 3e6f8124 authored by Johan Jonker's avatar Johan Jonker Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: swap timer clock-names 



With the conversion of rockchip,rk-timer.yaml the clock-names order
was set to "pclk", "timer", but nothing was fixed in the ARM dts section
of the mainline kernel, so the swap timer clock-names that don't fit.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent e220e0b0

arch/arm/boot/dts/rk3036.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -416,8 +416,8 @@ timer: timer@20044000 { 
		compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";

		reg = <0x20044000 0x20>;

		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&xin24m>, <&cru PCLK_TIMER>;

		clock-names = "timer", "pclk";

		clocks = <&cru PCLK_TIMER>, <&xin24m>;

		clock-names = "pclk", "timer";

	};



	pwm0: pwm@20050000 {

arch/arm/boot/dts/rk322x.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -477,8 +477,8 @@ timer: timer@110c0000 { 
		compatible = "rockchip,rk3228-timer", "rockchip,rk3288-timer";

		reg = <0x110c0000 0x20>;

		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&xin24m>, <&cru PCLK_TIMER>;

		clock-names = "timer", "pclk";

		clocks = <&cru PCLK_TIMER>, <&xin24m>;

		clock-names = "pclk", "timer";

	};



	cru: clock-controller@110e0000 {

arch/arm/boot/dts/rv1108.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -300,8 +300,8 @@ timer: timer@10350000 { 
		compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer";

		reg = <0x10350000 0x20>;

		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&xin24m>, <&cru PCLK_TIMER>;

		clock-names = "timer", "pclk";

		clocks = <&cru PCLK_TIMER>, <&xin24m>;

		clock-names = "pclk", "timer";

	};



	watchdog: watchdog@10360000 {