Commit 3e98855c authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Thierry Reding
Browse files

dt-bindings: pwm: mediatek: Convert pwm-mediatek to DT schema 



This converts pwm-mediatek.txt to mediatek,mt2712-pwm.yaml schema;
while at it, the clock names were clarified as previously they were
documented as "pwmX-Y", but valid names are "pwmN" only.
Also, the example was changed to use "mediatek,mt2712-pwm" instead
for consistency with the schema filename.

Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 3066bc2d

Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml

0 → 100644
+93 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek PWM Controller



maintainers:

  - John Crispin <john@phrozen.org>



allOf:

  - $ref: pwm.yaml#



properties:

  compatible:

    oneOf:

      - enum:

          - mediatek,mt2712-pwm

          - mediatek,mt6795-pwm

          - mediatek,mt7622-pwm

          - mediatek,mt7623-pwm

          - mediatek,mt7628-pwm

          - mediatek,mt7629-pwm

          - mediatek,mt8183-pwm

          - mediatek,mt8365-pwm

          - mediatek,mt8516-pwm

      - items:

          - enum:

              - mediatek,mt8195-pwm

          - const: mediatek,mt8183-pwm



  reg:

    maxItems: 1



  "#pwm-cells":

    const: 2



  interrupts:

    maxItems: 1



  clocks:

    minItems: 2

    maxItems: 10



  clock-names:

    description:

      This controller needs two input clocks for its core and one

      clock for each PWM output.

    minItems: 2

    items:

      - const: top

      - const: main

      - const: pwm1

      - const: pwm2

      - const: pwm3

      - const: pwm4

      - const: pwm5

      - const: pwm6

      - const: pwm7

      - const: pwm8



required:

  - compatible

  - reg

  - "#pwm-cells"

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/mt2712-clk.h>

    #include <dt-bindings/interrupt-controller/irq.h>



    pwm0: pwm@11006000 {

        compatible = "mediatek,mt2712-pwm";

        reg = <0x11006000 0x1000>;

        #pwm-cells = <2>;

        interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&topckgen CLK_TOP_PWM_SEL>, <&pericfg CLK_PERI_PWM>,

                 <&pericfg CLK_PERI_PWM0>, <&pericfg CLK_PERI_PWM1>,

                 <&pericfg CLK_PERI_PWM2>, <&pericfg CLK_PERI_PWM3>,

                 <&pericfg CLK_PERI_PWM4>, <&pericfg CLK_PERI_PWM5>,

                 <&pericfg CLK_PERI_PWM6>, <&pericfg CLK_PERI_PWM7>;

        clock-names = "top", "main",

                      "pwm1", "pwm2",

                      "pwm3", "pwm4",

                      "pwm5", "pwm6",

                      "pwm7", "pwm8";

    };

Documentation/devicetree/bindings/pwm/pwm-mediatek.txt

deleted100644 → 0
+0 −52
Original line number Diff line number Diff line 
MediaTek PWM controller



Required properties:

 - compatible: should be "mediatek,<name>-pwm":

   - "mediatek,mt2712-pwm": found on mt2712 SoC.

   - "mediatek,mt6795-pwm": found on mt6795 SoC.

   - "mediatek,mt7622-pwm": found on mt7622 SoC.

   - "mediatek,mt7623-pwm": found on mt7623 SoC.

   - "mediatek,mt7628-pwm": found on mt7628 SoC.

   - "mediatek,mt7629-pwm": found on mt7629 SoC.

   - "mediatek,mt8183-pwm": found on mt8183 SoC.

   - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC.

   - "mediatek,mt8365-pwm": found on mt8365 SoC.

   - "mediatek,mt8516-pwm": found on mt8516 SoC.

 - reg: physical base address and length of the controller's registers.

 - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of

   the cell format.

 - clocks: phandle and clock specifier of the PWM reference clock.

 - clock-names: must contain the following, except for MT7628 which

                has no clocks

   - "top": the top clock generator

   - "main": clock used by the PWM core

   - "pwm1-3": the three per PWM clocks for mt8365

   - "pwm1-8": the eight per PWM clocks for mt2712

   - "pwm1-6": the six per PWM clocks for mt7622

   - "pwm1-5": the five per PWM clocks for mt7623

   - "pwm1"  : the PWM1 clock for mt7629

 - pinctrl-names: Must contain a "default" entry.

 - pinctrl-0: One property must exist for each entry in pinctrl-names.

   See pinctrl/pinctrl-bindings.txt for details of the property values.



Optional properties:

- assigned-clocks: Reference to the PWM clock entries.

- assigned-clock-parents: The phandle of the parent clock of PWM clock.



Example:

	pwm0: pwm@11006000 {

		compatible = "mediatek,mt7623-pwm";

		reg = <0 0x11006000 0 0x1000>;

		#pwm-cells = <2>;

		clocks = <&topckgen CLK_TOP_PWM_SEL>,

			 <&pericfg CLK_PERI_PWM>,

			 <&pericfg CLK_PERI_PWM1>,

			 <&pericfg CLK_PERI_PWM2>,

			 <&pericfg CLK_PERI_PWM3>,

			 <&pericfg CLK_PERI_PWM4>,

			 <&pericfg CLK_PERI_PWM5>;

		clock-names = "top", "main", "pwm1", "pwm2",

			      "pwm3", "pwm4", "pwm5";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm0_pins>;

	};