Commit 3ef2bc09 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'devicetree-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 

Pull DeviceTree updates from Rob Herring:

 - fix sparse warnings in drivers/of/

 - add more overlay unittests

 - update dtc to v1.4.4-8-g756ffc4f52f6. This adds more checks on dts
   files such as unit-address formatting and stricter character sets for
   node and property names

 - add a common DT modalias function

 - move trivial-devices.txt up and out of i2c dir

 - ARM NVIC interrupt controller binding

 - vendor prefixes for Sensirion, Dioo, Nordic, ROHM

 - correct some binding file locations

* tag 'devicetree-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (24 commits)
  of: fix sparse warnings in fdt, irq, reserved mem, and resolver code
  of: fix sparse warning in of_pci_range_parser_one
  of: fix sparse warnings in of_find_next_cache_node
  of/unittest: Missing unlocks on error
  of: fix uninitialized variable warning for overlay test
  of: fix unittest build without CONFIG_OF_OVERLAY
  of: Add unit tests for applying overlays
  of: per-file dtc compiler flags
  fpga: region: add missing DT documentation for config complete timeout
  of: Add vendor prefix for ROHM Semiconductor
  of: fix "/cpus" reference leak in of_numa_parse_cpu_nodes()
  of: Add vendor prefix for Nordic Semiconductor
  dt-bindings: arm,nvic: Binding for ARM NVIC interrupt controller on Cortex-M
  dtc: update warning settings for new bus and node/property name checks
  scripts/dtc: Update to upstream version v1.4.4-8-g756ffc4f52f6
  scripts/dtc: automate getting dtc version and log in update script
  of: Add function for generating a DT modalias with a newline
  of: fix of_device_get_modalias returned length when truncating buffers
  Documentation: devicetree: move trivial-devices out of I2C realm
  dt-bindings: add vendor prefix for Dioo
  ..
parents 2eecf3a4 17a70355

Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt

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Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver

Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver





The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device.

The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device.

See ../mfd/atmel-hlcdc.txt for more details.

See ../../mfd/atmel-hlcdc.txt for more details.





Required properties:

Required properties:

 - compatible: value should be "atmel,hlcdc-display-controller"

 - compatible: value should be "atmel,hlcdc-display-controller"

Documentation/devicetree/bindings/fpga/fpga-region.txt

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@@ -193,6 +193,8 @@ Optional properties: 
- region-freeze-timeout-us : The maximum time in microseconds to wait for

- region-freeze-timeout-us : The maximum time in microseconds to wait for

	bridges to successfully become disabled before the region has been

	bridges to successfully become disabled before the region has been

	programmed.

	programmed.

- config-complete-timeout-us : The maximum time in microseconds time for the

	FPGA to go to operating mode after the region has been programmed.

- child nodes : devices in the FPGA after programming.

- child nodes : devices in the FPGA after programming.





In the example below, when an overlay is applied targeting fpga-region0,

In the example below, when an overlay is applied targeting fpga-region0,

Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt

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* ARM Nested Vector Interrupt Controller (NVIC)



The NVIC provides an interrupt controller that is tightly coupled to

Cortex-M based processor cores.  The NVIC implemented on different SoCs

vary in the number of interrupts and priority bits per interrupt.



Main node required properties:



- compatible : should be one of:

	"arm,v6m-nvic"

	"arm,v7m-nvic"

	"arm,v8m-nvic"

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source.  The type shall be a <u32> and the value shall be 2.



  The 1st cell contains the interrupt number for the interrupt type.



  The 2nd cell is the priority of the interrupt.



- reg : Specifies base physical address(s) and size of the NVIC registers.

  This is at a fixed address (0xe000e100) and size (0xc00).



- arm,num-irq-priority-bits: The number of priority bits implemented by the

  given SoC



Example:



	intc: interrupt-controller@e000e100 {

		compatible = "arm,v7m-nvic";

		#interrupt-cells = <2>;

		#address-cells = <1>;

		interrupt-controller;

		reg = <0xe000e100 0xc00>;

		arm,num-irq-priority-bits = <4>;

	};

Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt

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@@ -15,7 +15,7 @@ Required properties: 




The HLCDC IP exposes two subdevices:

The HLCDC IP exposes two subdevices:

 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt

 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt

 - a Display Controller: see ../display/atmel-hlcdc-dc.txt

 - a Display Controller: see ../display/atmel/hlcdc-dc.txt





Example:

Example:

Documentation/devicetree/bindings/net/moxa,moxart-mac.txt→Documentation/devicetree/bindings/net/faraday,ftmac.txt

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MOXA ART Ethernet Controller

Faraday Ethernet Controller





Required properties:

Required properties:





- compatible : Must be "moxa,moxart-mac"

- compatible : Must contain "faraday,ftmac", as well as one of

		the SoC specific identifiers:

		"andestech,atmac100"

		"moxa,moxart-mac"

- reg : Should contain register location and length

- reg : Should contain register location and length

- interrupts : Should contain the mac interrupt number

- interrupts : Should contain the mac interrupt number