Commit 3f027d61 authored by Ayaz A Siddiqui's avatar Ayaz A Siddiqui Committed by Matt Roper
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drm/i915/gt: Add separate MOCS table for Gen12 devices other than TGL/RKL 



MOCS table of TGL/RKL has MOCS[1] set to L3_UC.
While for other gen12 devices we need to set MOCS[1] as L3_WB,
So adding a new MOCS table for other gen 12 devices eg. ADL.

Fixes: cfbe5291 ("drm/i915/gt: Initialize unused MOCS entries with device specific values")
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarAyaz A Siddiqui <ayaz.siddiqui@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
[mattrope: fix whitespace error]
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210907171639.1221287-1-ayaz.siddiqui@intel.com
parent f5392e5f

drivers/gpu/drm/i915/gt/intel_mocs.c

+36 −4
Original line number Diff line number Diff line
@@ -315,6 +315,34 @@ static const struct drm_i915_mocs_entry dg1_mocs_table[] = { 
	MOCS_ENTRY(63, 0, L3_1_UC),

};



static const struct drm_i915_mocs_entry gen12_mocs_table[] = {

	GEN11_MOCS_ENTRIES,

	/* Implicitly enable L1 - HDC:L1 + L3 + LLC */

	MOCS_ENTRY(48,

		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),

		   L3_3_WB),

	/* Implicitly enable L1 - HDC:L1 + L3 */

	MOCS_ENTRY(49,

		   LE_1_UC | LE_TC_1_LLC,

		   L3_3_WB),

	/* Implicitly enable L1 - HDC:L1 + LLC */

	MOCS_ENTRY(50,

		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),

		   L3_1_UC),

	/* Implicitly enable L1 - HDC:L1 */

	MOCS_ENTRY(51,

		   LE_1_UC | LE_TC_1_LLC,

		   L3_1_UC),

	/* HW Special Case (CCS) */

	MOCS_ENTRY(60,

		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),

		   L3_1_UC),

	/* HW Special Case (Displayable) */

	MOCS_ENTRY(61,

		   LE_1_UC | LE_TC_1_LLC,

		   L3_3_WB),

};



enum {

	HAS_GLOBAL_MOCS = BIT(0),

	HAS_ENGINE_MOCS = BIT(1),
@@ -351,13 +379,17 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915, 
		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

		table->uc_index = 1;

		table->unused_entries_index = 5;

	} else if (GRAPHICS_VER(i915) >= 12) {

	} else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) {

		/* For TGL/RKL, Can't be changed now for ABI reasons */

		table->size  = ARRAY_SIZE(tgl_mocs_table);

		table->table = tgl_mocs_table;

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

		table->uc_index = 3;

		/* For TGL/RKL, Can't be changed now for ABI reasons */

		if (!IS_TIGERLAKE(i915) && !IS_ROCKETLAKE(i915))

	} else if (GRAPHICS_VER(i915) >= 12) {

		table->size  = ARRAY_SIZE(gen12_mocs_table);

		table->table = gen12_mocs_table;

		table->n_entries = GEN9_NUM_MOCS_ENTRIES;

		table->uc_index = 3;

		table->unused_entries_index = 2;

	} else if (GRAPHICS_VER(i915) == 11) {

		table->size  = ARRAY_SIZE(icl_mocs_table);