Commit 3f22d6c7 authored by Maxim Mikityanskiy's avatar Maxim Mikityanskiy Committed by Saeed Mahameed
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net/mlx5e: Move RX resources to a separate struct



This commit moves RQTs and TIRs to a separate struct that is allocated
dynamically in profiles that support these RX resources (all profiles,
except IPoIB PKey). It also allows to remove rqt_enabled flags, as RQTs
are always enabled in profiles that support RX resources.

Signed-off-by: default avatarMaxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 4ad31849
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+2 −24
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@
#include "en/qos.h"
#include "lib/hv_vhca.h"
#include "lib/clock.h"
#include "en/rqt.h"
#include "en/rx_res.h"

extern const struct net_device_ops mlx5e_netdev_ops;
struct page_pool;
@@ -141,7 +141,6 @@ struct page_pool;
#define MLX5E_PARAMS_DEFAULT_MIN_RX_WQES_MPW            0x2

#define MLX5E_MIN_NUM_CHANNELS         0x1
#define MLX5E_MAX_NUM_CHANNELS         (MLX5E_INDIR_RQT_SIZE / 2)
#define MLX5E_MAX_NUM_SQS              (MLX5E_MAX_NUM_CHANNELS * MLX5E_MAX_NUM_TC)
#define MLX5E_TX_CQ_POLL_BUDGET        128
#define MLX5E_TX_XSK_POLL_BUDGET       64
@@ -744,25 +743,11 @@ enum {
	MLX5E_STATE_XDP_ACTIVE,
};

struct mlx5e_tir {
	u32		  tirn;
	struct mlx5e_rqt  rqt;
	bool              rqt_enabled;
	struct list_head  list;
};

enum {
	MLX5E_TC_PRIO = 0,
	MLX5E_NIC_PRIO
};

struct mlx5e_rss_params {
	struct mlx5e_rss_params_indir indir;
	u32	rx_hash_fields[MLX5E_NUM_INDIR_TIRS];
	u8	toeplitz_hash_key[40];
	u8	hfunc;
};

struct mlx5e_modify_sq_param {
	int curr_state;
	int next_state;
@@ -832,14 +817,7 @@ struct mlx5e_priv {

	struct mlx5e_channels      channels;
	u32                        tisn[MLX5_MAX_PORTS][MLX5E_MAX_NUM_TC];
	struct mlx5e_rqt           indir_rqt;
	bool                       indir_rqt_enabled;
	struct mlx5e_tir           indir_tir[MLX5E_NUM_INDIR_TIRS];
	struct mlx5e_tir           inner_indir_tir[MLX5E_NUM_INDIR_TIRS];
	struct mlx5e_tir           direct_tir[MLX5E_MAX_NUM_CHANNELS];
	struct mlx5e_tir           xsk_tir[MLX5E_MAX_NUM_CHANNELS];
	struct mlx5e_tir           ptp_tir;
	struct mlx5e_rss_params    rss_params;
	struct mlx5e_rx_res       *rx_res;
	u32                        tx_rates[MLX5E_MAX_NUM_SQS];

	struct mlx5e_flow_steering fs;
+2 −0
Original line number Diff line number Diff line
@@ -160,6 +160,8 @@ enum {
					 MLX5E_INNER_TTC_GROUP2_SIZE +\
					 MLX5E_INNER_TTC_GROUP3_SIZE)

struct mlx5e_priv;

#ifdef CONFIG_MLX5_EN_RXNFC

struct mlx5e_ethtool_table {
+1 −1
Original line number Diff line number Diff line
@@ -603,8 +603,8 @@ static void mlx5e_ptp_rx_unset_fs(struct mlx5e_priv *priv)
static int mlx5e_ptp_rx_set_fs(struct mlx5e_priv *priv)
{
	struct mlx5e_ptp_fs *ptp_fs = priv->fs.ptp_fs;
	u32 tirn = priv->rx_res->ptp_tir.tirn;
	struct mlx5_flow_handle *rule;
	u32 tirn = priv->ptp_tir.tirn;
	int err;

	if (ptp_fs->valid)
+36 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2021, Mellanox Technologies inc. All rights reserved. */

#ifndef __MLX5_EN_RX_RES_H__
#define __MLX5_EN_RX_RES_H__

#include <linux/kernel.h>
#include "rqt.h"
#include "fs.h"

#define MLX5E_MAX_NUM_CHANNELS (MLX5E_INDIR_RQT_SIZE / 2)

struct mlx5e_rss_params {
	struct mlx5e_rss_params_indir indir;
	u32 rx_hash_fields[MLX5E_NUM_INDIR_TIRS];
	u8 toeplitz_hash_key[40];
	u8 hfunc;
};

struct mlx5e_tir {
	u32 tirn;
	struct mlx5e_rqt rqt;
	struct list_head list;
};

struct mlx5e_rx_res {
	struct mlx5e_rqt indir_rqt;
	struct mlx5e_tir indir_tirs[MLX5E_NUM_INDIR_TIRS];
	struct mlx5e_tir inner_indir_tirs[MLX5E_NUM_INDIR_TIRS];
	struct mlx5e_tir direct_tirs[MLX5E_MAX_NUM_CHANNELS];
	struct mlx5e_tir xsk_tirs[MLX5E_MAX_NUM_CHANNELS];
	struct mlx5e_tir ptp_tir;
	struct mlx5e_rss_params rss_params;
};

#endif /* __MLX5_EN_RX_RES_H__ */
+2 −2
Original line number Diff line number Diff line
@@ -186,12 +186,12 @@ void mlx5e_deactivate_xsk(struct mlx5e_channel *c)

int mlx5e_xsk_redirect_rqt_to_channel(struct mlx5e_priv *priv, struct mlx5e_channel *c)
{
	return mlx5e_rqt_redirect_direct(&priv->xsk_tir[c->ix].rqt, c->xskrq.rqn);
	return mlx5e_rqt_redirect_direct(&priv->rx_res->xsk_tirs[c->ix].rqt, c->xskrq.rqn);
}

int mlx5e_xsk_redirect_rqt_to_drop(struct mlx5e_priv *priv, u16 ix)
{
	return mlx5e_rqt_redirect_direct(&priv->xsk_tir[ix].rqt, priv->drop_rq.rqn);
	return mlx5e_rqt_redirect_direct(&priv->rx_res->xsk_tirs[ix].rqt, priv->drop_rq.rqn);
}

int mlx5e_xsk_redirect_rqts_to_channels(struct mlx5e_priv *priv, struct mlx5e_channels *chs)
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