Loading sound/soc/codecs/wm8990.c +19 −13 Original line number Diff line number Diff line Loading @@ -36,6 +36,17 @@ struct wm8990_priv { unsigned int pcmclk; }; static int wm8990_volatile_register(struct snd_soc_codec *codec, unsigned int reg) { switch (reg) { case WM8990_RESET: return 1; default: return 0; } } /* * wm8990 register cache. Note that register 0 is not included in the * cache. Loading Loading @@ -1156,6 +1167,7 @@ static int wm8990_mute(struct snd_soc_dai *dai, int mute) static int wm8990_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { int ret; u16 val; switch (level) { Loading @@ -1171,6 +1183,12 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_STANDBY: if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { ret = snd_soc_cache_sync(codec); if (ret < 0) { dev_err(codec->dev, "Failed to sync cache: %d\n", ret); return ret; } /* Enable all output discharge bits */ snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | Loading Loading @@ -1319,19 +1337,6 @@ static int wm8990_suspend(struct snd_soc_codec *codec, pm_message_t state) static int wm8990_resume(struct snd_soc_codec *codec) { int i; u8 data[2]; u16 *cache = codec->reg_cache; /* Sync reg_cache with the hardware */ for (i = 0; i < ARRAY_SIZE(wm8990_reg); i++) { if (i + 1 == WM8990_RESET) continue; data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); data[1] = cache[i] & 0x00ff; codec->hw_write(codec->control_data, data, 2); } wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); return 0; } Loading Loading @@ -1392,6 +1397,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { .reg_cache_size = ARRAY_SIZE(wm8990_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8990_reg, .volatile_register = wm8990_volatile_register, }; #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) Loading Loading
sound/soc/codecs/wm8990.c +19 −13 Original line number Diff line number Diff line Loading @@ -36,6 +36,17 @@ struct wm8990_priv { unsigned int pcmclk; }; static int wm8990_volatile_register(struct snd_soc_codec *codec, unsigned int reg) { switch (reg) { case WM8990_RESET: return 1; default: return 0; } } /* * wm8990 register cache. Note that register 0 is not included in the * cache. Loading Loading @@ -1156,6 +1167,7 @@ static int wm8990_mute(struct snd_soc_dai *dai, int mute) static int wm8990_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { int ret; u16 val; switch (level) { Loading @@ -1171,6 +1183,12 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, case SND_SOC_BIAS_STANDBY: if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { ret = snd_soc_cache_sync(codec); if (ret < 0) { dev_err(codec->dev, "Failed to sync cache: %d\n", ret); return ret; } /* Enable all output discharge bits */ snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | Loading Loading @@ -1319,19 +1337,6 @@ static int wm8990_suspend(struct snd_soc_codec *codec, pm_message_t state) static int wm8990_resume(struct snd_soc_codec *codec) { int i; u8 data[2]; u16 *cache = codec->reg_cache; /* Sync reg_cache with the hardware */ for (i = 0; i < ARRAY_SIZE(wm8990_reg); i++) { if (i + 1 == WM8990_RESET) continue; data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); data[1] = cache[i] & 0x00ff; codec->hw_write(codec->control_data, data, 2); } wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); return 0; } Loading Loading @@ -1392,6 +1397,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8990 = { .reg_cache_size = ARRAY_SIZE(wm8990_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8990_reg, .volatile_register = wm8990_volatile_register, }; #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) Loading