Commit 41ce405e authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() 



By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):

   text    data     bss     dec     hex filename
1078551    4557     416 1083524  108884 drivers/gpu/drm/i915/i915.ko
1070775    4557     416 1075748  106a24 drivers/gpu/drm/i915/i915.ko

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1467297225-21379-5-git-send-email-chris@chris-wilson.co.uk
parent b2736695

drivers/gpu/drm/i915/i915_drv.c

+4 −4
Original line number Diff line number Diff line
@@ -2588,8 +2588,7 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv, 


	mask = VLV_GTLC_PW_MEDIA_STATUS_MASK | VLV_GTLC_PW_RENDER_STATUS_MASK;

	val = wait_for_on ? mask : 0;

#define COND ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)

	if (COND)

	if ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)

		return 0;



	DRM_DEBUG_KMS("waiting for GT wells to go %s (%08x)\n",
@@ -2600,13 +2599,14 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv, 
	 * RC6 transitioning can be delayed up to 2 msec (see

	 * valleyview_enable_rps), use 3 msec for safety.

	 */

	err = wait_for(COND, 3);

	err = intel_wait_for_register(dev_priv,

				      VLV_GTLC_PW_STATUS, mask, val,

				      3);

	if (err)

		DRM_ERROR("timeout waiting for GT wells to go %s\n",

			  onoff(wait_for_on));



	return err;

#undef COND

}



static void vlv_check_no_gt_access(struct drm_i915_private *dev_priv)