Commit 425057e7 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915/display: Disable FBC when PSR2 is enabled display 12 and newer 



This is now a requirement for all display 12 and newer, not only for
tigerlake.

BSpec: 50422
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210625235600.765677-2-jose.souza@intel.com
parent 36203e4f

drivers/gpu/drm/i915/display/intel_fbc.c

+2 −2
Original line number Diff line number Diff line
@@ -912,11 +912,11 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc) 
	}



	/*

	 * Tigerlake is not supporting FBC with PSR2.

	 * Display 12+ is not supporting FBC with PSR2.

	 * Recommendation is to keep this combination disabled

	 * Bspec: 50422 HSD: 14010260002

	 */

	if (fbc->state_cache.psr2_active && IS_TIGERLAKE(dev_priv)) {

	if (fbc->state_cache.psr2_active && DISPLAY_VER(dev_priv) >= 12) {

		fbc->no_fbc_reason = "not supported with PSR2";

		return false;

	}