Commit 4291d085 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/32s: Make pte_update() non atomic on 603 core 



On 603 core, TLB miss handler don't do any change to the
page tables so pte_update() doesn't need to be atomic.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/cc89d3c11fc9c742d0df3454a657a3a00be24046.1643538554.git.christophe.leroy@csgroup.eu
parent 535bda36

arch/powerpc/include/asm/book3s/32/pgtable.h

+22 −15
Original line number Diff line number Diff line
@@ -298,9 +298,11 @@ static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, p 
				     unsigned long clr, unsigned long set, int huge)

{

	pte_basic_t old;



	if (mmu_has_feature(MMU_FTR_HPTE_TABLE)) {

		unsigned long tmp;



	__asm__ __volatile__(

		asm volatile(

#ifndef CONFIG_PTE_64BIT

	"1:	lwarx	%0, 0, %3\n"

	"	andc	%1, %0, %4\n"
@@ -320,6 +322,11 @@ static inline pte_basic_t pte_update(struct mm_struct *mm, unsigned long addr, p 
#endif

		  "r" (clr), "r" (set), "m" (*p)

		: "cc" );

	} else {

		old = pte_val(*p);



		*p = __pte((old & ~(pte_basic_t)clr) | set);

	}



	return old;

}