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Commit 42b91bb1 authored by Andre Przywara's avatar Andre Przywara Committed by Jernej Skrabec
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dt-bindings: watchdog: sunxi: clarify clock support



Most Allwinner SoCs have just one input clock to drive the watchdog
peripheral. So far this is the 24 MHz "HOSC" oscillator, divided down
internally to 32 KHz.
The F1C100 series watchdog however uses the unchanged 32 KHz "LOSC" as
its only clock input, which has the same effect, but let's the binding
description mismatch.

Change the binding description to name the clocks more loosely, so both
the LOSC and divided HOSC match the description. As the fixed clock names
now make less sense, drop them from SoCs supporting just one clock
input, they were not used by any DT anyway.

For the newer SoCs, supporting a choice of two input clocks, we keep
both the description and clock-names requirement.

Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Reviewed-by: default avatarSamuel Holland <samuel@sholland.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-3-andre.przywara@arm.com
parent 6d41e130
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