Commit 42ce32b1 authored by Larry Finger's avatar Larry Finger Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: Remove unused macros and defines from odm.h 



This header defines a number of symbols/macros that are not used and can
be removed. In addition, it defines a number of synonym symbols that are
used interchangeably in the source. Only one is now selected.

In addition to the above, a number of comments that have no meaning for
this chip have been removed.

Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Link: https://lore.kernel.org/r/20210927214527.5341-1-Larry.Finger@lwfinger.net


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bd46a1f1

drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c

+6 −6
Original line number Diff line number Diff line
@@ -538,7 +538,7 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) 


u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)

{

	if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))

	if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))

		return 0;

	return dm_odm->RAInfo[macid].RateSGI;

}
@@ -547,7 +547,7 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) 
{

	u8 DecisionRate = 0;



	if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))

	if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))

		return 0;

	DecisionRate = (dm_odm->RAInfo[macid].DecisionRate);

	return DecisionRate;
@@ -557,7 +557,7 @@ u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) 
{

	u8 PTStage = 5;



	if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))

	if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))

		return 0;

	PTStage = (dm_odm->RAInfo[macid].PTStage);

	return PTStage;
@@ -567,7 +567,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate 
{

	struct odm_ra_info *pRaInfo = NULL;



	if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))

	if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))

		return;



	pRaInfo = &dm_odm->RAInfo[macid];
@@ -581,7 +581,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) 
{

	struct odm_ra_info *pRaInfo = NULL;



	if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))

	if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))

		return;



	pRaInfo = &dm_odm->RAInfo[macid];
@@ -605,7 +605,7 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 
	pBuffer = TxRPT_Buf;



	do {

		if (MacId >= ASSOCIATE_ENTRY_NUM)

		if (MacId >= ODM_ASSOCIATE_ENTRY_NUM)

			valid = 0;

		else if (MacId >= 32)

			valid = (1 << (MacId - 32)) & macid_entry1;

drivers/staging/r8188eu/include/odm.h

+9 −136
Original line number Diff line number Diff line
@@ -4,79 +4,16 @@ 
#ifndef	__HALDMOUTSRC_H__

#define __HALDMOUTSRC_H__



/*  Definition */

/*  Define all team support ability. */



/*  Define for all teams. Please Define the constant in your precomp header. */



/* define		DM_ODM_SUPPORT_AP			0 */

/* define		DM_ODM_SUPPORT_ADSL			0 */

/* define		DM_ODM_SUPPORT_CE			0 */

/* define		DM_ODM_SUPPORT_MP			1 */



/*  Define ODM SW team support flag. */



/*  Antenna Switch Relative Definition. */



/*  Add new function SwAntDivCheck8192C(). */

/*  This is the main function of Antenna diversity function before link. */

/*  Mainly, it just retains last scan result and scan again. */

/*  After that, it compares the scan result to see which one gets better

 *  RSSI. It selects antenna with better receiving power and returns better

 *  scan result. */



#define	TP_MODE			0

#define	RSSI_MODE		1

#define	TRAFFIC_LOW		0

#define	TRAFFIC_HIGH		1



/* 3 Tx Power Tracking */

/* 3============================================================ */

#define		DPK_DELTA_MAPPING_NUM	13

#define		index_mapping_HP_NUM	15



/*  */

/* 3 PSD Handler */

/* 3============================================================ */



#define	AFH_PSD		1	/* 0:normal PSD scan, 1: only do 20 pts PSD */

#define	MODE_40M	0	/* 0:20M, 1:40M */

#define	PSD_TH2		3

#define	PSD_CHM		20   /*  Minimum channel number for BT AFH */

#define	SIR_STEP_SIZE	3

#define Smooth_Size_1	5

#define	Smooth_TH_1	3

#define Smooth_Size_2	10

#define	Smooth_TH_2	4

#define Smooth_Size_3	20

#define	Smooth_TH_3	4

#define Smooth_Step_Size 5

#define	Adaptive_SIR	1

#define	PSD_RESCAN	4

#define	PSD_SCAN_INTERVAL	700 /* ms */



/* 8723A High Power IGI Setting */

#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND	0x22

#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28

#define DM_DIG_HIGH_PWR_THRESHOLD	0x3a



/*  LPS define */

#define DM_DIG_FA_TH0_LPS		4 /*  4 in lps */

#define DM_DIG_FA_TH1_LPS		15 /*  15 lps */

#define DM_DIG_FA_TH2_LPS		30 /*  30 lps */

#define RSSI_OFFSET_DIG			0x05;



/* ANT Test */

#define ANTTESTALL		0x00	/* Ant A or B will be Testing */

#define ANTTESTA		0x01	/* Ant A will be Testing */

#define ANTTESTB		0x02	/* Ant B will be testing */



/* RF REG */

#define ODM_CHANNEL	0x18



/* Ant Detect Reg */

#define ODM_DPDT	0x300



/*  structure and define */



/*  Add for AP/ADSLpseudo DM structuer requirement. */
@@ -184,23 +121,13 @@ struct rx_hpc { 
	struct timer_list PSDTimer;

};



#define ASSOCIATE_ENTRY_NUM	32 /*  Max size of AsocEntry[]. */

#define	ODM_ASSOCIATE_ENTRY_NUM	ASSOCIATE_ENTRY_NUM

#define ODM_ASSOCIATE_ENTRY_NUM	32 /*  Max size of AsocEntry[]. */



/*  This indicates two different steps. */

/*  In SWAW_STEP_PEAK, driver needs to switch antenna and listen to

/*  Using SWAW_STEP_PEAK, driver needs to switch antenna and listen to

 *  the signal on the air. */

/*  In SWAW_STEP_DETERMINE, driver just compares the signal captured in

 *  SWAW_STEP_PEAK with original RSSI to determine if it is necessary to

 *  switch antenna. */



#define SWAW_STEP_PEAK		0

#define SWAW_STEP_DETERMINE	1



#define	TP_MODE			0

#define	RSSI_MODE		1

#define	TRAFFIC_LOW		0

#define	TRAFFIC_HIGH		1



struct sw_ant_switch {

	u8	try_flag;
@@ -232,13 +159,13 @@ struct sw_ant_switch { 
	u8	TrafficLoad;

	struct timer_list SwAntennaSwitchTimer;

	/* Hybrid Antenna Diversity */

	u32	CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];

	u32	CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];

	u32	OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];

	u32	OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];

	u32	RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];

	u32	RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];

	u8	TxAnt[ASSOCIATE_ENTRY_NUM];

	u32	CCK_Ant1_Cnt[ODM_ASSOCIATE_ENTRY_NUM];

	u32	CCK_Ant2_Cnt[ODM_ASSOCIATE_ENTRY_NUM];

	u32	OFDM_Ant1_Cnt[ODM_ASSOCIATE_ENTRY_NUM];

	u32	OFDM_Ant2_Cnt[ODM_ASSOCIATE_ENTRY_NUM];

	u32	RSSI_Ant1_Sum[ODM_ASSOCIATE_ENTRY_NUM];

	u32	RSSI_Ant2_Sum[ODM_ASSOCIATE_ENTRY_NUM];

	u8	TxAnt[ODM_ASSOCIATE_ENTRY_NUM];

	u8	TargetSTA;

	u8	antsel;

	u8	RxIdleAnt;
@@ -267,7 +194,6 @@ struct odm_rate_adapt { 
#define AVG_THERMAL_NUM		8

#define IQK_Matrix_REG_NUM	8



#define	DM_Type_ByFWi		0

#define	DM_Type_ByDriver	1



/*  Declare for common info */
@@ -980,42 +906,6 @@ enum dm_dig_op { 
#define		DM_DIG_BACKOFF_MIN		-4

#define		DM_DIG_BACKOFF_DEFAULT		10



/* 3=========================================================== */

/* 3 AGC RX High Power Mode */

/* 3=========================================================== */

#define	  LNA_Low_Gain_1		0x64

#define	  LNA_Low_Gain_2		0x5A

#define	  LNA_Low_Gain_3		0x58



#define	  FA_RXHP_TH1			5000

#define	  FA_RXHP_TH2			1500

#define	  FA_RXHP_TH3			800

#define	  FA_RXHP_TH4			600

#define	  FA_RXHP_TH5			500



/* 3=========================================================== */

/* 3 EDCA */

/* 3=========================================================== */



/* 3=========================================================== */

/* 3 Dynamic Tx Power */

/* 3=========================================================== */

/* Dynamic Tx Power Control Threshold */

#define		TX_POWER_NEAR_FIELD_THRESH_LVL2	74

#define		TX_POWER_NEAR_FIELD_THRESH_LVL1	67

#define		TX_POWER_NEAR_FIELD_THRESH_AP		0x3F



#define		TxHighPwrLevel_Normal		0

#define		TxHighPwrLevel_Level1		1

#define		TxHighPwrLevel_Level2		2

#define		TxHighPwrLevel_BT1		3

#define		TxHighPwrLevel_BT2		4

#define		TxHighPwrLevel_15		5

#define		TxHighPwrLevel_35		6

#define		TxHighPwrLevel_50		7

#define		TxHighPwrLevel_70		8

#define		TxHighPwrLevel_100		9



/* 3=========================================================== */

/* 3 Rate Adaptive */

/* 3=========================================================== */
@@ -1049,11 +939,7 @@ enum dm_swas { 
	Antenna_MAX = 3,

};



/*  Maximal number of antenna detection mechanism needs to perform. */

#define	MAX_ANTENNA_DETECTION_CNT	10



/*  Extern Global Variables. */

#define	OFDM_TABLE_SIZE_92C	37

#define	OFDM_TABLE_SIZE_92D	43

#define	CCK_TABLE_SIZE		33
@@ -1063,34 +949,21 @@ extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; 


/*  check Sta pointer valid or not */

#define IS_STA_VALID(pSta)		(pSta)

/*  20100514 Joseph: Add definition for antenna switching test after link. */

/*  This indicates two different the steps. */

/*  In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the

 *  signal on the air. */

/*  In SWAW_STEP_DETERMINE, driver just compares the signal captured in

 *  SWAW_STEP_PEAK */

/*  with original RSSI to determine if it is necessary to switch antenna. */

#define SWAW_STEP_PEAK		0

#define SWAW_STEP_DETERMINE	1



void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);

void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);



void ODM_SetAntenna(struct odm_dm_struct *pDM_Odm, u8 Antenna);



#define dm_RF_Saving	ODM_RF_Saving

void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal);



#define SwAntDivRestAfterLink	ODM_SwAntDivRestAfterLink

void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm);



#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck

void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm);



bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI,

		      bool bForceUpdate, u8 *pRATRState);



#define dm_SWAW_RSSI_Check	ODM_SwAntDivChkPerPktRssi

void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID,

			       struct odm_phy_status_info *pPhyInfo);