Commit 431a84b1 authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King
Browse files

ARM: 8034/1: Disable preemption in iwmmxt_task_enable() 



This patch is in preparation for calling the iwmmxt_task_enable()
function with interrupts enabled.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent a05e54c1

arch/arm/kernel/iwmmxt.S

+11 −3
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <asm/ptrace.h>

#include <asm/thread_info.h>

#include <asm/asm-offsets.h>

#include <asm/assembler.h>



#if defined(CONFIG_CPU_PJ4)

#define PJ4(code...)		code
@@ -65,13 +66,14 @@ 
 */



ENTRY(iwmmxt_task_enable)

	inc_preempt_count r10, r3



	XSC(mrc	p15, 0, r2, c15, c1, 0)

	PJ4(mrc p15, 0, r2, c1, c0, 2)

	@ CP0 and CP1 accessible?

	XSC(tst	r2, #0x3)

	PJ4(tst	r2, #0xf)

	movne	pc, lr				@ if so no business here

	bne	4f				@ if so no business here

	@ enable access to CP0 and CP1

	XSC(orr	r2, r2, #0x3)

	XSC(mcr	p15, 0, r2, c15, c1, 0)
@@ -132,7 +134,7 @@ concan_dump: 
	wstrd	wR15, [r1, #MMX_WR15]



2:	teq	r0, #0				@ anything to load?

	moveq	pc, lr

	beq	3f



concan_load:
@@ -165,8 +167,14 @@ concan_load: 
	@ clear CUP/MUP (only if r1 != 0)

	teq	r1, #0

	mov 	r2, #0

	moveq	pc, lr

	beq	3f

	tmcr	wCon, r2



3:

#ifdef CONFIG_PREEMPT_COUNT

	get_thread_info r10

#endif

4:	dec_preempt_count r10, r3

	mov	pc, lr



/*