Commit 43676501 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec 



This patch enables SGTL5000 audio codec on the carrier board.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590611013-26029-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3816124f

arch/arm/boot/dts/r8a7742-iwg21d-q7.dts

+37 −0
Original line number Diff line number Diff line
@@ -23,6 +23,20 @@ chosen { 
		stdout-path = "serial2:115200n8";

	};



	audio_clock: audio_clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <26000000>;

	};



	reg_1p5v: 1p5v {

		compatible = "regulator-fixed";

		regulator-name = "1P5V";

		regulator-min-microvolt = <1500000>;

		regulator-max-microvolt = <1500000>;

		regulator-always-on;

	};



	vcc_sdhi2: regulator-vcc-sdhi2 {

		compatible = "regulator-fixed";
@@ -61,12 +75,35 @@ phy3: ethernet-phy@3 { 
	};

};



&i2c2 {

	pinctrl-0 = <&i2c2_pins>;

	pinctrl-names = "default";



	status = "okay";

	clock-frequency = <400000>;



	sgtl5000: codec@a {

		compatible = "fsl,sgtl5000";

		#sound-dai-cells = <0>;

		reg = <0x0a>;

		clocks = <&audio_clock>;

		VDDA-supply = <&reg_3p3v>;

		VDDIO-supply = <&reg_3p3v>;

		VDDD-supply = <&reg_1p5v>;

	};

};



&pfc {

	avb_pins: avb {

		groups = "avb_mdio", "avb_gmii";

		function = "avb";

	};



	i2c2_pins: i2c2 {

		groups = "i2c2_b";

		function = "i2c2";

	};



	scifa2_pins: scifa2 {

		groups = "scifa2_data_c";

		function = "scifa2";