Commit 4390730c authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Bjorn Andersson
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arm64: dts: qcom: sm8350: Use proper CPU compatibles 



The Kryo names (once again) turned out to be fake. The CPUs report:

0x412fd050 (CA55 r2p0) (0 - 3)
0x411fd410 (CA78 r1p1) (4 - 6)
0x411fd440 (CX1  r1p1) (7)

Use the compatibles that reflect that.

Fixes: b7e8f433 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230706-topic-sm8350-cpu-compat-v1-1-f8d6a1869781@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 9c31a3f5

arch/arm64/boot/dts/qcom/sm8350.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ cpus { 


		CPU0: cpu@0 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x0>;

			clocks = <&cpufreq_hw 0>;

			enable-method = "psci";
@@ -72,7 +72,7 @@ L3_0: l3-cache { 


		CPU1: cpu@100 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x100>;

			clocks = <&cpufreq_hw 0>;

			enable-method = "psci";
@@ -91,7 +91,7 @@ L2_100: l2-cache { 


		CPU2: cpu@200 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x200>;

			clocks = <&cpufreq_hw 0>;

			enable-method = "psci";
@@ -110,7 +110,7 @@ L2_200: l2-cache { 


		CPU3: cpu@300 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a55";

			reg = <0x0 0x300>;

			clocks = <&cpufreq_hw 0>;

			enable-method = "psci";
@@ -129,7 +129,7 @@ L2_300: l2-cache { 


		CPU4: cpu@400 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a78";

			reg = <0x0 0x400>;

			clocks = <&cpufreq_hw 1>;

			enable-method = "psci";
@@ -148,7 +148,7 @@ L2_400: l2-cache { 


		CPU5: cpu@500 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a78";

			reg = <0x0 0x500>;

			clocks = <&cpufreq_hw 1>;

			enable-method = "psci";
@@ -167,7 +167,7 @@ L2_500: l2-cache { 


		CPU6: cpu@600 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-a78";

			reg = <0x0 0x600>;

			clocks = <&cpufreq_hw 1>;

			enable-method = "psci";
@@ -186,7 +186,7 @@ L2_600: l2-cache { 


		CPU7: cpu@700 {

			device_type = "cpu";

			compatible = "qcom,kryo685";

			compatible = "arm,cortex-x1";

			reg = <0x0 0x700>;

			clocks = <&cpufreq_hw 2>;

			enable-method = "psci";