Commit 43b0c905 authored by Marian-Cristian Rotariu's avatar Marian-Cristian Rotariu Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774e1: Add GPIO device nodes 



Add GPIO device nodes to the DT of the r8a774e1 SoC.

Signed-off-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f1bf8ff8

arch/arm64/boot/dts/renesas/r8a774e1.dtsi

+56 −17
Original line number Diff line number Diff line
@@ -246,84 +246,123 @@ rwdt: watchdog@e6020000 { 
		};



		gpio0: gpio@e6050000 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6050000 0 0x50>;

			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 0 16>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 912>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 912>;

		};



		gpio1: gpio@e6051000 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6051000 0 0x50>;

			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 32 29>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 911>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 911>;

		};



		gpio2: gpio@e6052000 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6052000 0 0x50>;

			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 64 15>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 910>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 910>;

		};



		gpio3: gpio@e6053000 {

			/* placeholder */

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6053000 0 0x50>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 96 16>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 909>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 909>;

		};



		gpio4: gpio@e6054000 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6054000 0 0x50>;

			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 128 18>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 908>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 908>;

		};



		gpio5: gpio@e6055000 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055000 0 0x50>;

			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 160 26>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 907>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 907>;

		};



		gpio6: gpio@e6055400 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055400 0 0x50>;

			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 192 32>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 906>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 906>;

		};



		gpio7: gpio@e6055800 {

			compatible = "renesas,gpio-r8a774e1",

				     "renesas,rcar-gen3-gpio";

			reg = <0 0xe6055800 0 0x50>;

			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-ranges = <&pfc 0 224 4>;

			#interrupt-cells = <2>;

			interrupt-controller;



			/* placeholder */

			clocks = <&cpg CPG_MOD 905>;

			power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;

			resets = <&cpg 905>;

		};



		pfc: pin-controller@e6060000 {