Loading drivers/gpu/drm/radeon/cik.c +21 −0 Original line number Diff line number Diff line Loading @@ -5554,3 +5554,24 @@ void dce8_bandwidth_update(struct radeon_device *rdev) dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); } } /** * cik_get_gpu_clock_counter - return GPU clock counter snapshot * * @rdev: radeon_device pointer * * Fetches a GPU clock counter snapshot (SI). * Returns the 64 bit clock counter snapshot. */ uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev) { uint64_t clock; mutex_lock(&rdev->gpu_clock_mutex); WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1); clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) | ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32ULL); mutex_unlock(&rdev->gpu_clock_mutex); return clock; } drivers/gpu/drm/radeon/cikd.h +3 −1 Original line number Diff line number Diff line Loading @@ -730,7 +730,9 @@ #define RLC_GPM_UCODE_ADDR 0xC388 #define RLC_GPM_UCODE_DATA 0xC38C #define RLC_GPU_CLOCK_COUNT_LSB 0xC390 #define RLC_GPU_CLOCK_COUNT_MSB 0xC394 #define RLC_CAPTURE_GPU_CLOCK_COUNT 0xC398 #define RLC_UCODE_CNTL 0xC39C #define RLC_CGCG_CGLS_CTRL 0xC424 Loading drivers/gpu/drm/radeon/radeon_asic.h +5 −0 Original line number Diff line number Diff line Loading @@ -553,4 +553,9 @@ u32 si_get_xclk(struct radeon_device *rdev); uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); /* * cik */ uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); #endif Loading
drivers/gpu/drm/radeon/cik.c +21 −0 Original line number Diff line number Diff line Loading @@ -5554,3 +5554,24 @@ void dce8_bandwidth_update(struct radeon_device *rdev) dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); } } /** * cik_get_gpu_clock_counter - return GPU clock counter snapshot * * @rdev: radeon_device pointer * * Fetches a GPU clock counter snapshot (SI). * Returns the 64 bit clock counter snapshot. */ uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev) { uint64_t clock; mutex_lock(&rdev->gpu_clock_mutex); WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1); clock = (uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_LSB) | ((uint64_t)RREG32(RLC_GPU_CLOCK_COUNT_MSB) << 32ULL); mutex_unlock(&rdev->gpu_clock_mutex); return clock; }
drivers/gpu/drm/radeon/cikd.h +3 −1 Original line number Diff line number Diff line Loading @@ -730,7 +730,9 @@ #define RLC_GPM_UCODE_ADDR 0xC388 #define RLC_GPM_UCODE_DATA 0xC38C #define RLC_GPU_CLOCK_COUNT_LSB 0xC390 #define RLC_GPU_CLOCK_COUNT_MSB 0xC394 #define RLC_CAPTURE_GPU_CLOCK_COUNT 0xC398 #define RLC_UCODE_CNTL 0xC39C #define RLC_CGCG_CGLS_CTRL 0xC424 Loading
drivers/gpu/drm/radeon/radeon_asic.h +5 −0 Original line number Diff line number Diff line Loading @@ -553,4 +553,9 @@ u32 si_get_xclk(struct radeon_device *rdev); uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); /* * cik */ uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); #endif