Commit 45f174d8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'juno-updates-5.13' of... 

Merge tag 'juno-updates-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno updates for v5.13

Couple of changes to describe PCI dma-ranges correctly which was
previously removed and to enable the PCIe and DMA SMMU.

* tag 'juno-updates-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Enable more SMMUs
  arm64: dts: juno: Describe PCI dma-ranges

Link: https://lore.kernel.org/r/20210331100410.cenuhvpqoumvsk52@bogus


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d2adc561 d9df28ba

arch/arm64/boot/dts/arm/juno-base.dtsi

+4 −1
Original line number Diff line number Diff line
@@ -544,6 +544,10 @@ pcie_ctlr: pcie@40000000 { 
		ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>,

			 <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,

			 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;

		/* Standard AXI Translation entries as programmed by EDK2 */

		dma-ranges = <0x02000000 0x0 0x2c1c0000 0x0 0x2c1c0000 0x0 0x00040000>,

			     <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>,

			     <0x43000000 0x8 0x00000000 0x8 0x00000000 0x2 0x00000000>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 7>;

		interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
@@ -640,7 +644,6 @@ smmu_dma: iommu@7fb00000 { 
		#iommu-cells = <1>;

		#global-interrupts = <1>;

		dma-coherent;

		status = "disabled";

	};



	smmu_hdlcd1: iommu@7fb10000 {

arch/arm64/boot/dts/arm/juno-r1.dts

+4 −0
Original line number Diff line number Diff line
@@ -230,6 +230,10 @@ &pcie_ctlr { 
	status = "okay";

};



&smmu_pcie {

	status = "okay";

};



&etm0 {

	cpu = <&A57_0>;

};

arch/arm64/boot/dts/arm/juno-r2.dts

+4 −0
Original line number Diff line number Diff line
@@ -236,6 +236,10 @@ &pcie_ctlr { 
	status = "okay";

};



&smmu_pcie {

	status = "okay";

};



&etm0 {

	cpu = <&A72_0>;

};