Commit 47b009db authored by Johan Hovold's avatar Johan Hovold Committed by Vinod Koul
Browse files

phy: qcom-qmp-usb: drop start and pwrdn-ctrl abstraction 



Drop the start and pwrdn-ctrl abstractions which are no longer needed
since the QMP driver split.

Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221012085002.24099-20-johan+linaro@kernel.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent cb4a982f

drivers/phy/qualcomm/phy-qcom-qmp-usb.c

+5 −56
Original line number Diff line number Diff line
@@ -1443,9 +1443,6 @@ struct qmp_phy_cfg { 
	/* array of registers with different offsets */

	const unsigned int *regs;



	unsigned int start_ctrl;

	unsigned int pwrdn_ctrl;



	/* true, if PHY needs delay after POWER_DOWN */

	bool has_pwrdn_delay;
@@ -1599,9 +1596,6 @@ static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = { 
	.vreg_list		= qmp_phy_vreg_l,

	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,

};



static const struct qmp_phy_cfg msm8996_usb3phy_cfg = {
@@ -1622,9 +1616,6 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = { 
	.vreg_list		= qmp_phy_vreg_l,

	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,

};



static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
@@ -1646,9 +1637,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = { 
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qmp_v3_usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

	.has_phy_dp_com_ctrl	= true,

};
@@ -1672,9 +1660,6 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = { 
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qmp_v3_usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

	.has_phy_dp_com_ctrl	= true,

};
@@ -1697,9 +1682,6 @@ static const struct qmp_phy_cfg sc8280xp_usb3_uniphy_cfg = { 
	.vreg_list		= qmp_phy_vreg_l,

	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qmp_v4_usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,

};



static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
@@ -1721,9 +1703,6 @@ static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = { 
	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qmp_v3_usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1745,9 +1724,6 @@ static const struct qmp_phy_cfg msm8998_usb3phy_cfg = { 
	.vreg_list              = qmp_phy_vreg_l,

	.num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),

	.regs                   = qmp_v3_usb3phy_regs_layout,



	.start_ctrl             = SERDES_START | PCS_START,

	.pwrdn_ctrl             = SW_PWRDN,

};



static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
@@ -1772,9 +1748,6 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x300,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

	.has_phy_dp_com_ctrl	= true,

};
@@ -1801,9 +1774,6 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x600,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1829,9 +1799,6 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x300,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

	.has_phy_dp_com_ctrl	= true,

};
@@ -1858,9 +1825,6 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x600,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1886,9 +1850,6 @@ static const struct qmp_phy_cfg sdx55_usb3_uniphy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x600,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1914,9 +1875,6 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x1000,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1942,9 +1900,6 @@ static const struct qmp_phy_cfg sm8350_usb3phy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x300,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

	.has_phy_dp_com_ctrl	= true,

};
@@ -1971,9 +1926,6 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = { 
	.regs			= qmp_v4_usb3phy_regs_layout,

	.pcs_usb_offset		= 0x1000,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,



	.has_pwrdn_delay	= true,

};
@@ -1995,9 +1947,6 @@ static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = { 
	.vreg_list		= qmp_phy_vreg_l,

	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),

	.regs			= qcm2290_usb3phy_regs_layout,



	.start_ctrl		= SERDES_START | PCS_START,

	.pwrdn_ctrl		= SW_PWRDN,

};



static void qmp_usb_configure_lane(void __iomem *base,
@@ -2092,8 +2041,7 @@ static int qmp_usb_init(struct phy *phy) 
		qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);

	}



	qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			cfg->pwrdn_ctrl);

	qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN);



	return 0;
@@ -2160,7 +2108,7 @@ static int qmp_usb_power_on(struct phy *phy) 
	qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);



	/* start SerDes and Phy-Coding-Sublayer */

	qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);

	qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START);



	status = pcs + cfg->regs[QPHY_PCS_STATUS];

	ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 200,
@@ -2189,11 +2137,12 @@ static int qmp_usb_power_off(struct phy *phy) 
	qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);



	/* stop SerDes and Phy-Coding-Sublayer */

	qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);

	qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL],

			SERDES_START | PCS_START);



	/* Put PHY into POWER DOWN state: active low */

	qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			cfg->pwrdn_ctrl);

			SW_PWRDN);



	return 0;

}