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Commit 48029e62 authored by David Clear's avatar David Clear Committed by Tudor Ambarus
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mtd: spi-nor: macronix: Add support for mx66u2g45g



The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device that
supports x1, x2, or x4 operation.

Tested on Pensando SoC hardware with a cadence quadspi controller
via drivers/spi/spi-cadence-quadspi.c, in x2 mode at 50MHz.
  - random data write, erase, read   - verified erase operations
  - random data write, read/compare  - verified write/read operations

Signed-off-by: default avatarDavid Clear <dac2@pensando.io>
Acked-by: default avatarShannon Nelson <snelson@pensando.io>
Link: https://lore.kernel.org/r/20200720163656.38006-2-dac2@pensando.io


Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
parent 44a80df4
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