Unverified Commit 496ea826 authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt
Browse files

RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa"



As it says on the tin, provide Kconfig option to control parsing the
"riscv,isa" devicetree property. If either option is used, the kernel
will fall back to parsing "riscv,isa", where "riscv,isa-base" and
"riscv,isa-extensions" are not present.
The Kconfig options are set up so that the default kernel configuration
will enable the fallback path, without needing the commandline option.

Suggested-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Suggested-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230713-aviator-plausibly-a35662485c2c@wendy


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent c98f136a
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+7 −0
Original line number Diff line number Diff line
@@ -5468,6 +5468,13 @@
			[KNL] Disable ring 3 MONITOR/MWAIT feature on supported
			CPUs.

	riscv_isa_fallback [RISCV]
			When CONFIG_RISCV_ISA_FALLBACK is not enabled, permit
			falling back to detecting extension support by parsing
			"riscv,isa" property on devicetree systems when the
			replacement properties are not found. See the Kconfig
			entry for RISCV_ISA_FALLBACK.

	ro		[KNL] Mount root device read-only on boot

	rodata=		[KNL]
+18 −0
Original line number Diff line number Diff line
@@ -848,6 +848,24 @@ config XIP_PHYS_ADDR
	  be linked for and stored to.  This address is dependent on your
	  own flash usage.

config RISCV_ISA_FALLBACK
	bool "Permit falling back to parsing riscv,isa for extension support by default"
	default y
	help
	  Parsing the "riscv,isa" devicetree property has been deprecated and
	  replaced by a list of explicitly defined strings. For compatibility
	  with existing platforms, the kernel will fall back to parsing the
	  "riscv,isa" property if the replacements are not found.

	  Selecting N here will result in a kernel that does not use the
	  fallback, unless the commandline "riscv_isa_fallback" parameter is
	  present.

	  Please see the dt-binding, located at
	  Documentation/devicetree/bindings/riscv/extensions.yaml for details
	  on the replacement properties, "riscv,isa-base" and
	  "riscv,isa-extensions".

endmenu # "Boot options"

config BUILTIN_DTB
+1 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ struct riscv_isa_ext_data {

extern const struct riscv_isa_ext_data riscv_isa_ext[];
extern const size_t riscv_isa_ext_count;
extern bool riscv_isa_fallback;

unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);

+7 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
	return 0;
}

int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart)
int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hart)
{
	const char *isa;

@@ -87,6 +87,12 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har
	return 0;

old_interface:
	if (!riscv_isa_fallback) {
		pr_warn("CPU with hartid=%lu is invalid: this kernel does not parse \"riscv,isa\"",
			*hart);
		return -ENODEV;
	}

	if (of_property_read_string(node, "riscv,isa", &isa)) {
		pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",
			*hart);
+13 −1
Original line number Diff line number Diff line
@@ -473,6 +473,18 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap)
	return 0;
}

#ifdef CONFIG_RISCV_ISA_FALLBACK
bool __initdata riscv_isa_fallback = true;
#else
bool __initdata riscv_isa_fallback;
static int __init riscv_isa_fallback_setup(char *__unused)
{
	riscv_isa_fallback = true;
	return 1;
}
early_param("riscv_isa_fallback", riscv_isa_fallback_setup);
#endif

void __init riscv_fill_hwcap(void)
{
	char print_str[NUM_ALPHA_EXTS + 1];
@@ -492,7 +504,7 @@ void __init riscv_fill_hwcap(void)
	} else {
		int ret = riscv_fill_hwcap_from_ext_list(isa2hwcap);

		if (ret) {
		if (ret && riscv_isa_fallback) {
			pr_info("Falling back to deprecated \"riscv,isa\"\n");
			riscv_fill_hwcap_from_isa_string(isa2hwcap);
		}