Commit 4992b360 authored by Johannes Berg's avatar Johannes Berg
Browse files

wifi: mac80211_hwsim: split iftype data into AP/non-AP 



The next patch will require splitting the data here into
AP and non-AP because for EHT, the format of the MCS/NSS
support (struct ieee80211_eht_mcs_nss_supp) is different,
for AP the only_20mhz cannot be used.

Signed-off-by: default avatarJohannes Berg <johannes.berg@intel.com>
parent 1cb3cf37

drivers/net/wireless/mac80211_hwsim.c

+379 −8
Original line number Diff line number Diff line
@@ -3208,8 +3208,112 @@ static void hwsim_mcast_new_radio(int id, struct genl_info *info, 


static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = {

	{

		.types_mask = BIT(NL80211_IFTYPE_STATION) |

			      BIT(NL80211_IFTYPE_AP),

		.types_mask = BIT(NL80211_IFTYPE_STATION),

		.he_cap = {

			.has_he = true,

			.he_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_HE_MAC_CAP0_HTC_HE,

				.mac_cap_info[1] =

					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |

					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,

				.mac_cap_info[2] =

					IEEE80211_HE_MAC_CAP2_BSR |

					IEEE80211_HE_MAC_CAP2_MU_CASCADING |

					IEEE80211_HE_MAC_CAP2_ACK_EN,

				.mac_cap_info[3] =

					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |

					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,

				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,

				.phy_cap_info[1] =

					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |

					IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |

					IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |

					IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS,

				.phy_cap_info[2] =

					IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |

					IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |

					IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO,



				/* Leave all the other PHY capability bytes

				 * unset, as DCM, beam forming, RU and PPE

				 * threshold information are not supported

				 */

			},

			.he_mcs_nss_supp = {

				.rx_mcs_80 = cpu_to_le16(0xfffa),

				.tx_mcs_80 = cpu_to_le16(0xfffa),

				.rx_mcs_160 = cpu_to_le16(0xffff),

				.tx_mcs_160 = cpu_to_le16(0xffff),

				.rx_mcs_80p80 = cpu_to_le16(0xffff),

				.tx_mcs_80p80 = cpu_to_le16(0xffff),

			},

		},

		.eht_cap = {

			.has_eht = true,

			.eht_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |

					IEEE80211_EHT_MAC_CAP0_OM_CONTROL |

					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1,

				.phy_cap_info[0] =

					IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ |

					IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |

					IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE,

				.phy_cap_info[3] =

					IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK,

				.phy_cap_info[4] =

					IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP |

					IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP |

					IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI |

					IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK,

				.phy_cap_info[5] =

					IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK |

					IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT |

					IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK |

					IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK,

				.phy_cap_info[6] =

					IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK |

					IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK,

				.phy_cap_info[7] =

					IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW,

			},



			/* For all MCS and bandwidth, set 8 NSS for both Tx and

			 * Rx

			 */

			.eht_mcs_nss_supp = {

				/*

				 * Since B0, B1, B2 and B3 are not set in

				 * the supported channel width set field in the

				 * HE PHY capabilities information field the

				 * device is a 20MHz only device on 2.4GHz band.

				 */

				.only_20mhz = {

					.rx_tx_mcs7_max_nss = 0x88,

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

			},

			/* PPE threshold information is not supported */

		},

	},

	{

		.types_mask = BIT(NL80211_IFTYPE_AP),

		.he_cap = {

			.has_he = true,

			.he_cap_elem = {
@@ -3357,8 +3461,131 @@ static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = { 
static const struct ieee80211_sband_iftype_data sband_capa_5ghz[] = {

	{

		/* TODO: should we support other types, e.g., P2P? */

		.types_mask = BIT(NL80211_IFTYPE_STATION) |

			      BIT(NL80211_IFTYPE_AP),

		.types_mask = BIT(NL80211_IFTYPE_STATION),

		.he_cap = {

			.has_he = true,

			.he_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_HE_MAC_CAP0_HTC_HE,

				.mac_cap_info[1] =

					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |

					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,

				.mac_cap_info[2] =

					IEEE80211_HE_MAC_CAP2_BSR |

					IEEE80211_HE_MAC_CAP2_MU_CASCADING |

					IEEE80211_HE_MAC_CAP2_ACK_EN,

				.mac_cap_info[3] =

					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |

					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,

				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,

				.phy_cap_info[0] =

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G,

				.phy_cap_info[1] =

					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |

					IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |

					IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |

					IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS,

				.phy_cap_info[2] =

					IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |

					IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |

					IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO,



				/* Leave all the other PHY capability bytes

				 * unset, as DCM, beam forming, RU and PPE

				 * threshold information are not supported

				 */

			},

			.he_mcs_nss_supp = {

				.rx_mcs_80 = cpu_to_le16(0xfffa),

				.tx_mcs_80 = cpu_to_le16(0xfffa),

				.rx_mcs_160 = cpu_to_le16(0xfffa),

				.tx_mcs_160 = cpu_to_le16(0xfffa),

				.rx_mcs_80p80 = cpu_to_le16(0xfffa),

				.tx_mcs_80p80 = cpu_to_le16(0xfffa),

			},

		},

		.eht_cap = {

			.has_eht = true,

			.eht_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |

					IEEE80211_EHT_MAC_CAP0_OM_CONTROL |

					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1,

				.phy_cap_info[0] =

					IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ |

					IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |

					IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE |

					IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK,

				.phy_cap_info[1] =

					IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK |

					IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK,

				.phy_cap_info[2] =

					IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK |

					IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK,

				.phy_cap_info[3] =

					IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK,

				.phy_cap_info[4] =

					IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP |

					IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP |

					IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI |

					IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK,

				.phy_cap_info[5] =

					IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK |

					IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT |

					IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK |

					IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK,

				.phy_cap_info[6] =

					IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK |

					IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK,

				.phy_cap_info[7] =

					IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW |

					IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ |

					IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ |

					IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ |

					IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ,

			},



			/* For all MCS and bandwidth, set 8 NSS for both Tx and

			 * Rx

			 */

			.eht_mcs_nss_supp = {

				/*

				 * As B1 and B2 are set in the supported

				 * channel width set field in the HE PHY

				 * capabilities information field include all

				 * the following MCS/NSS.

				 */

				.bw._80 = {

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

				.bw._160 = {

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

			},

			/* PPE threshold information is not supported */

		},

	},

	{

		.types_mask = BIT(NL80211_IFTYPE_AP),

		.he_cap = {

			.has_he = true,

			.he_cap_elem = {
@@ -3530,8 +3757,152 @@ static const struct ieee80211_sband_iftype_data sband_capa_5ghz[] = { 
static const struct ieee80211_sband_iftype_data sband_capa_6ghz[] = {

	{

		/* TODO: should we support other types, e.g., P2P? */

		.types_mask = BIT(NL80211_IFTYPE_STATION) |

			      BIT(NL80211_IFTYPE_AP),

		.types_mask = BIT(NL80211_IFTYPE_STATION),

		.he_6ghz_capa = {

			.capa = cpu_to_le16(IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START |

					    IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP |

					    IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN |

					    IEEE80211_HE_6GHZ_CAP_SM_PS |

					    IEEE80211_HE_6GHZ_CAP_RD_RESPONDER |

					    IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |

					    IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS),

		},

		.he_cap = {

			.has_he = true,

			.he_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_HE_MAC_CAP0_HTC_HE,

				.mac_cap_info[1] =

					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |

					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,

				.mac_cap_info[2] =

					IEEE80211_HE_MAC_CAP2_BSR |

					IEEE80211_HE_MAC_CAP2_MU_CASCADING |

					IEEE80211_HE_MAC_CAP2_ACK_EN,

				.mac_cap_info[3] =

					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |

					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3,

				.mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU,

				.phy_cap_info[0] =

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G |

					IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G,

				.phy_cap_info[1] =

					IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |

					IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |

					IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |

					IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS,

				.phy_cap_info[2] =

					IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |

					IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |

					IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |

					IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO,



				/* Leave all the other PHY capability bytes

				 * unset, as DCM, beam forming, RU and PPE

				 * threshold information are not supported

				 */

			},

			.he_mcs_nss_supp = {

				.rx_mcs_80 = cpu_to_le16(0xfffa),

				.tx_mcs_80 = cpu_to_le16(0xfffa),

				.rx_mcs_160 = cpu_to_le16(0xfffa),

				.tx_mcs_160 = cpu_to_le16(0xfffa),

				.rx_mcs_80p80 = cpu_to_le16(0xfffa),

				.tx_mcs_80p80 = cpu_to_le16(0xfffa),

			},

		},

		.eht_cap = {

			.has_eht = true,

			.eht_cap_elem = {

				.mac_cap_info[0] =

					IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |

					IEEE80211_EHT_MAC_CAP0_OM_CONTROL |

					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1,

				.phy_cap_info[0] =

					IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ |

					IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ |

					IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI |

					IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER |

					IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE |

					IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK,

				.phy_cap_info[1] =

					IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK |

					IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK |

					IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK,

				.phy_cap_info[2] =

					IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK |

					IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK |

					IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK,

				.phy_cap_info[3] =

					IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK |

					IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK |

					IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK,

				.phy_cap_info[4] =

					IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO |

					IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP |

					IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP |

					IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI |

					IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK,

				.phy_cap_info[5] =

					IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK |

					IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP |

					IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT |

					IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK |

					IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK,

				.phy_cap_info[6] =

					IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK |

					IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK |

					IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP,

				.phy_cap_info[7] =

					IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW |

					IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ |

					IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ |

					IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ |

					IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ |

					IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ |

					IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ,

			},



			/* For all MCS and bandwidth, set 8 NSS for both Tx and

			 * Rx

			 */

			.eht_mcs_nss_supp = {

				/*

				 * As B1 and B2 are set in the supported

				 * channel width set field in the HE PHY

				 * capabilities information field and 320MHz in

				 * 6GHz is supported include all the following

				 * MCS/NSS.

				 */

				.bw._80 = {

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

				.bw._160 = {

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

				.bw._320 = {

					.rx_tx_mcs9_max_nss = 0x88,

					.rx_tx_mcs11_max_nss = 0x88,

					.rx_tx_mcs13_max_nss = 0x88,

				},

			},

			/* PPE threshold information is not supported */

		},

	},

	{

		.types_mask = BIT(NL80211_IFTYPE_AP),

		.he_6ghz_capa = {

			.capa = cpu_to_le16(IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START |

					    IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP |