Commit 4a4a79c0 authored by Jonathan Cameron's avatar Jonathan Cameron
Browse files

iio: dac: ad5592r: Fix alignment for DMA safety 



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 56ca9db8 ("iio: dac: Add support for the AD5592R/AD5593R ADCs/DACs")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-49-jic23@kernel.org
parent 00b9737c

drivers/iio/dac/ad5592r-base.h

+3 −1
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@ 
#include <linux/mutex.h>

#include <linux/gpio/driver.h>



#include <linux/iio/iio.h>



struct device;

struct ad5592r_state;
@@ -65,7 +67,7 @@ struct ad5592r_state { 
	u8 gpio_in;

	u8 gpio_val;



	__be16 spi_msg ____cacheline_aligned;

	__be16 spi_msg __aligned(IIO_DMA_MINALIGN);

	__be16 spi_msg_nop;

};