Commit 4a692ae3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_mm_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 mm updates from Borislav Petkov:

 - Flush *all* mappings from the TLB after switching to the trampoline
   pagetable to prevent any stale entries' presence

 - Flush global mappings from the TLB, in addition to the CR3-write,
   after switching off of the trampoline_pgd during boot to clear the
   identity mappings

 - Prevent instrumentation issues resulting from the above changes

* tag 'x86_mm_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm: Prevent early boot triple-faults with instrumentation
  x86/mm: Include spinlock_t definition in pgtable.
  x86/mm: Flush global TLB when switching to trampoline page-table
  x86/mm/64: Flush global TLB on boot and AP bringup
  x86/realmode: Add comment for Global bit usage in trampoline_pgd
  x86/mm: Add missing <asm/cpufeatures.h> dependency to <asm/page_64.h>
parents bfed6efb b64dfcde

arch/x86/include/asm/page_64.h

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
#include <asm/page_64_types.h>



#ifndef __ASSEMBLY__

#include <asm/cpufeatures.h>

#include <asm/alternative.h>



/* duplicated to the one in bootmem.h */

arch/x86/include/asm/pgtable.h

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#define pgprot_decrypted(prot)	__pgprot(__sme_clr(pgprot_val(prot)))



#ifndef __ASSEMBLY__

#include <linux/spinlock.h>

#include <asm/x86_init.h>

#include <asm/pkru.h>

#include <asm/fpu/api.h>

arch/x86/include/asm/realmode.h

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ static inline void set_real_mode_mem(phys_addr_t mem) 
}



void reserve_real_mode(void);

void load_trampoline_pgtable(void);



#endif /* __ASSEMBLY__ */

arch/x86/include/asm/tlbflush.h

+5 −0
Original line number Diff line number Diff line
@@ -261,4 +261,9 @@ extern void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch); 


#endif /* !MODULE */



static inline void __native_tlb_flush_global(unsigned long cr4)

{

	native_write_cr4(cr4 ^ X86_CR4_PGE);

	native_write_cr4(cr4);

}

#endif /* _ASM_X86_TLBFLUSH_H */

arch/x86/kernel/cpu/common.c

+1 −1
Original line number Diff line number Diff line
@@ -384,7 +384,7 @@ void native_write_cr0(unsigned long val) 
}

EXPORT_SYMBOL(native_write_cr0);



void native_write_cr4(unsigned long val)

void __no_profile native_write_cr4(unsigned long val)

{

	unsigned long bits_changed = 0;