Commit 4c9e92df authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Sylwester Nawrocki
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clk: exynos5433: Add documentation for the audio block parent clocks



Audio block requires access to two parent clocks: audio PLL and oscillator,
so add this information to device tree bindings documentation.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
parent 9a81188e
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+7 −0
Original line number Original line Diff line number Diff line
@@ -104,6 +104,10 @@ Required Properties:
		- sclk_decon_tv_vclk_disp
		- sclk_decon_tv_vclk_disp
		- aclk_disp_333
		- aclk_disp_333


	Input clocks for audio clock controller:
		- oscclk
		- fout_aud_pll

	Input clocks for bus0 clock controller:
	Input clocks for bus0 clock controller:
		- aclk_bus0_400
		- aclk_bus0_400


@@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below.
		compatible = "samsung,exynos5433-cmu-aud";
		compatible = "samsung,exynos5433-cmu-aud";
		reg = <0x114c0000 0x0b04>;
		reg = <0x114c0000 0x0b04>;
		#clock-cells = <1>;
		#clock-cells = <1>;

		clock-names = "oscclk", "fout_aud_pll";
		clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
	};
	};


	cmu_bus0: clock-controller@13600000 {
	cmu_bus0: clock-controller@13600000 {