Commit 4cda2f4a authored by Hui Tang's avatar Hui Tang Committed by Herbert Xu
Browse files

crypto: hisilicon/qm - optimize the barrier operation 



A 'dma_wmb' barrier is enough to guarantee previous writes
before accessing by acc device in the outer shareable domain.

A 'smp_wmb' barrier is enough to guarantee previous writes
before accessing by other cpus in the inner shareble domain.

Signed-off-by: default avatarHui Tang <tanghui20@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent d5db91d2

drivers/crypto/hisilicon/qm.c

+3 −3
Original line number Diff line number Diff line
@@ -687,13 +687,13 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src) 


	if (!IS_ENABLED(CONFIG_ARM64)) {

		memcpy_toio(fun_base, src, 16);

		wmb();

		dma_wmb();

		return;

	}



	asm volatile("ldp %0, %1, %3\n"

		     "stp %0, %1, %2\n"

		     "dsb sy\n"

		     "dmb oshst\n"

		     : "=&r" (tmp0),

		       "=&r" (tmp1),

		       "+Q" (*((char __iomem *)fun_base))
@@ -982,7 +982,7 @@ static void qm_set_qp_disable(struct hisi_qp *qp, int offset) 
	*addr = 1;



	/* make sure setup is completed */

	mb();

	smp_wmb();

}



static void qm_disable_qp(struct hisi_qm *qm, u32 qp_id)