Commit 4df654d2 authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/amdgpu: move amdgpu_uvd structure to uvd header 



Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 135d4735

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −29
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ 
#include "amd_powerplay.h"

#include "amdgpu_dpm.h"

#include "amdgpu_acp.h"

#include "amdgpu_uvd.h"



#include "gpu_scheduler.h"

#include "amdgpu_virt.h"
@@ -1033,35 +1034,6 @@ void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb); 


void amdgpu_get_pcie_info(struct amdgpu_device *adev);



/*

 * UVD

 */

#define AMDGPU_DEFAULT_UVD_HANDLES	10

#define AMDGPU_MAX_UVD_HANDLES		40

#define AMDGPU_UVD_STACK_SIZE		(200*1024)

#define AMDGPU_UVD_HEAP_SIZE		(256*1024)

#define AMDGPU_UVD_SESSION_SIZE		(50*1024)

#define AMDGPU_UVD_FIRMWARE_OFFSET	256



struct amdgpu_uvd {

	struct amdgpu_bo	*vcpu_bo;

	void			*cpu_addr;

	uint64_t		gpu_addr;

	unsigned		fw_version;

	void			*saved_bo;

	unsigned		max_handles;

	atomic_t		handles[AMDGPU_MAX_UVD_HANDLES];

	struct drm_file		*filp[AMDGPU_MAX_UVD_HANDLES];

	struct delayed_work	idle_work;

	const struct firmware	*fw;	/* UVD firmware */

	struct amdgpu_ring	ring;

	struct amdgpu_irq_src	irq;

	bool			address_64_bit;

	bool			use_ctx_buf;

	struct amd_sched_entity entity;

	uint32_t                srbm_soft_reset;

};



/*

 * VCE

 */

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h

+26 −0
Original line number Diff line number Diff line
@@ -24,6 +24,32 @@ 
#ifndef __AMDGPU_UVD_H__

#define __AMDGPU_UVD_H__



#define AMDGPU_DEFAULT_UVD_HANDLES	10

#define AMDGPU_MAX_UVD_HANDLES		40

#define AMDGPU_UVD_STACK_SIZE		(200*1024)

#define AMDGPU_UVD_HEAP_SIZE		(256*1024)

#define AMDGPU_UVD_SESSION_SIZE		(50*1024)

#define AMDGPU_UVD_FIRMWARE_OFFSET	256



struct amdgpu_uvd {

	struct amdgpu_bo	*vcpu_bo;

	void			*cpu_addr;

	uint64_t		gpu_addr;

	unsigned		fw_version;

	void			*saved_bo;

	unsigned		max_handles;

	atomic_t		handles[AMDGPU_MAX_UVD_HANDLES];

	struct drm_file		*filp[AMDGPU_MAX_UVD_HANDLES];

	struct delayed_work	idle_work;

	const struct firmware	*fw;	/* UVD firmware */

	struct amdgpu_ring	ring;

	struct amdgpu_irq_src	irq;

	bool			address_64_bit;

	bool			use_ctx_buf;

	struct amd_sched_entity entity;

	uint32_t                srbm_soft_reset;

};



int amdgpu_uvd_sw_init(struct amdgpu_device *adev);

int amdgpu_uvd_sw_fini(struct amdgpu_device *adev);

int amdgpu_uvd_suspend(struct amdgpu_device *adev);