Commit 4e01bbec authored by Ran Sun's avatar Ran Sun Committed by Alex Deucher
Browse files

drm/amdgpu: Clean up errors in smu7_powertune.c 



Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: default avatarRan Sun <sunran001@208suo.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cbe2d154

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

+5 −8
Original line number Original line Diff line number Diff line
@@ -520,8 +520,7 @@ static const struct gpu_pt_config_reg DIDTConfig_Polaris12[] = { 
	{   0xFFFFFFFF  }

	{   0xFFFFFFFF  }

};

};





static const struct gpu_pt_config_reg DIDTConfig_Polaris11_Kicker[] =

static const struct gpu_pt_config_reg DIDTConfig_Polaris11_Kicker[] = {

{

/* ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

/* ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

 *      Offset                             Mask                                                Shift                                               Value       Type

 *      Offset                             Mask                                                Shift                                               Value       Type

 * ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

 * ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -666,8 +665,7 @@ static const struct gpu_pt_config_reg DIDTConfig_Polaris11_Kicker[] = 
	{   0xFFFFFFFF  }  /* End of list */

	{   0xFFFFFFFF  }  /* End of list */

};

};





static const struct gpu_pt_config_reg GCCACConfig_VegaM[] =

static const struct gpu_pt_config_reg GCCACConfig_VegaM[] = {

{

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

//      Offset                             Mask                                                Shift                                               Value       Type

//      Offset                             Mask                                                Shift                                               Value       Type

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
@@ -703,8 +701,7 @@ static const struct gpu_pt_config_reg GCCACConfig_VegaM[] = 
    {   0xFFFFFFFF  }  // End of list

    {   0xFFFFFFFF  }  // End of list

};

};





static const struct gpu_pt_config_reg DIDTConfig_VegaM[] =

static const struct gpu_pt_config_reg DIDTConfig_VegaM[] = {

{

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

//      Offset                             Mask                                                Shift                                               Value       Type

//      Offset                             Mask                                                Shift                                               Value       Type

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

// ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------