Loading arch/arm/boot/dts/imx51.dtsi +13 −7 Original line number Diff line number Diff line Loading @@ -82,6 +82,19 @@ cpu: cpu@0 { }; }; usbphy { #address-cells = <1>; #size-cells = <0>; compatible = "simple-bus"; usbphy0: usbphy@0 { compatible = "usb-nop-xceiv"; reg = <0>; clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clock-names = "main_clk"; }; }; soc { #address-cells = <1>; #size-cells = <1>; Loading Loading @@ -203,13 +216,6 @@ esdhc4: esdhc@70024000 { }; }; usbphy0: usbphy@0 { compatible = "usb-nop-xceiv"; clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clock-names = "main_clk"; status = "okay"; }; usbotg: usb@73f80000 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; Loading Loading
arch/arm/boot/dts/imx51.dtsi +13 −7 Original line number Diff line number Diff line Loading @@ -82,6 +82,19 @@ cpu: cpu@0 { }; }; usbphy { #address-cells = <1>; #size-cells = <0>; compatible = "simple-bus"; usbphy0: usbphy@0 { compatible = "usb-nop-xceiv"; reg = <0>; clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clock-names = "main_clk"; }; }; soc { #address-cells = <1>; #size-cells = <1>; Loading Loading @@ -203,13 +216,6 @@ esdhc4: esdhc@70024000 { }; }; usbphy0: usbphy@0 { compatible = "usb-nop-xceiv"; clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clock-names = "main_clk"; status = "okay"; }; usbotg: usb@73f80000 { compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; Loading