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Commit 4f1fa2a1 authored by Like Xu's avatar Like Xu Committed by Paolo Bonzini
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KVM: x86/pmu: Limit the maximum number of supported Intel GP counters



The Intel Architectural IA32_PMCx MSRs addresses range allows for a
maximum of 8 GP counters, and KVM cannot address any more.  Introduce a
local macro (named KVM_INTEL_PMC_MAX_GENERIC) and use it consistently to
refer to the number of counters supported by KVM, thus avoiding possible
out-of-bound accesses.

Suggested-by: default avatarJim Mattson <jmattson@google.com>
Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Reviewed-by: default avatarJim Mattson <jmattson@google.com>
Message-Id: <20220919091008.60695-2-likexu@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 8631ef59
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