drm/nve0/copy: add initial support for the async copy engines (4f32656d) · Commits · jan.koester / Linux

drivers/gpu/drm/nouveau/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -103,6 +103,7 @@ nouveau-y += core/engine/dmaobj/nvc0.o
		nouveau-y += core/engine/bsp/nv84.o
		nouveau-y += core/engine/copy/nva3.o
		nouveau-y += core/engine/copy/nvc0.o
		nouveau-y += core/engine/copy/nve0.o
		nouveau-y += core/engine/crypt/nv84.o
		nouveau-y += core/engine/crypt/nv98.o
		nouveau-y += core/engine/disp/nv04.o

drivers/gpu/drm/nouveau/core/engine/copy/nve0.c

0 → 100644

+156 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright 2012 Red Hat Inc.
		*
		* Permission is hereby granted, free of charge, to any person obtaining a
		* copy of this software and associated documentation files (the "Software"),
		* to deal in the Software without restriction, including without limitation
		* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		* and/or sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following conditions:
		*
		* The above copyright notice and this permission notice shall be included in
		* all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
		* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
		* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*
		* Authors: Ben Skeggs
		*/

		#include <core/os.h>
		#include <core/enum.h>
		#include <core/class.h>
		#include <core/engctx.h>

		#include <engine/copy.h>

		struct nve0_copy_priv {
		struct nouveau_copy base;
		};

		struct nve0_copy_chan {
		struct nouveau_copy_chan base;
		};

		/*******************************************************************************
		* Copy object classes
		******************************************************************************/

		static struct nouveau_oclass
		nve0_copy_sclass[] = {
		{ 0xa0b5, &nouveau_object_ofuncs },
		{},
		};

		/*******************************************************************************
		* PCOPY context
		******************************************************************************/

		static int
		nve0_copy_context_ctor(struct nouveau_object *parent,
		struct nouveau_object *engine,
		struct nouveau_oclass oclass, void data, u32 size,
		struct nouveau_object **pobject)
		{
		struct nve0_copy_chan *priv;
		int ret;

		ret = nouveau_copy_context_create(parent, engine, oclass, NULL, 256,
		256, NVOBJ_FLAG_ZERO_ALLOC, &priv);
		*pobject = nv_object(priv);
		if (ret)
		return ret;

		return 0;
		}

		static struct nouveau_ofuncs
		nve0_copy_context_ofuncs = {
		.ctor = nve0_copy_context_ctor,
		.dtor = _nouveau_copy_context_dtor,
		.init = _nouveau_copy_context_init,
		.fini = _nouveau_copy_context_fini,
		.rd32 = _nouveau_copy_context_rd32,
		.wr32 = _nouveau_copy_context_wr32,
		};

		static struct nouveau_oclass
		nve0_copy_cclass = {
		.handle = NV_ENGCTX(COPY0, 0xc0),
		.ofuncs = &nve0_copy_context_ofuncs,
		};

		/*******************************************************************************
		* PCOPY engine/subdev functions
		******************************************************************************/

		static int
		nve0_copy0_ctor(struct nouveau_object parent, struct nouveau_object engine,
		struct nouveau_oclass oclass, void data, u32 size,
		struct nouveau_object **pobject)
		{
		struct nve0_copy_priv *priv;
		int ret;

		if (nv_rd32(parent, 0x022500) & 0x00000100)
		return -ENODEV;

		ret = nouveau_copy_create(parent, engine, oclass, true, 0, &priv);
		*pobject = nv_object(priv);
		if (ret)
		return ret;

		nv_subdev(priv)->unit = 0x00000040;
		nv_engine(priv)->cclass = &nve0_copy_cclass;
		nv_engine(priv)->sclass = nve0_copy_sclass;
		return 0;
		}

		static int
		nve0_copy1_ctor(struct nouveau_object parent, struct nouveau_object engine,
		struct nouveau_oclass oclass, void data, u32 size,
		struct nouveau_object **pobject)
		{
		struct nve0_copy_priv *priv;
		int ret;

		if (nv_rd32(parent, 0x022500) & 0x00000200)
		return -ENODEV;

		ret = nouveau_copy_create(parent, engine, oclass, true, 1, &priv);
		*pobject = nv_object(priv);
		if (ret)
		return ret;

		nv_subdev(priv)->unit = 0x00000080;
		nv_engine(priv)->cclass = &nve0_copy_cclass;
		nv_engine(priv)->sclass = nve0_copy_sclass;
		return 0;
		}

		struct nouveau_oclass
		nve0_copy0_oclass = {
		.handle = NV_ENGINE(COPY0, 0xe0),
		.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nve0_copy0_ctor,
		.dtor = _nouveau_copy_dtor,
		.init = _nouveau_copy_init,
		.fini = _nouveau_copy_fini,
		},
		};

		struct nouveau_oclass
		nve0_copy1_oclass = {
		.handle = NV_ENGINE(COPY1, 0xe0),
		.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nve0_copy1_ctor,
		.dtor = _nouveau_copy_dtor,
		.init = _nouveau_copy_init,
		.fini = _nouveau_copy_fini,
		},
		};

drivers/gpu/drm/nouveau/core/include/engine/copy.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -43,5 +43,7 @@ struct nouveau_copy {
		extern struct nouveau_oclass nva3_copy_oclass;
		extern struct nouveau_oclass nvc0_copy0_oclass;
		extern struct nouveau_oclass nvc0_copy1_oclass;
		extern struct nouveau_oclass nve0_copy0_oclass;
		extern struct nouveau_oclass nve0_copy1_oclass;

		#endif

drivers/gpu/drm/nouveau/core/subdev/device/nve0.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -42,6 +42,7 @@
		#include <engine/software.h>
		#include <engine/graph.h>
		#include <engine/disp.h>
		#include <engine/copy.h>

		int
		nve0_identify(struct nouveau_device *device)
		@@ -67,6 +68,8 @@ nve0_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
		device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
		device->oclass[NVDEV_ENGINE_DISP ] = &nvd0_disp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
		device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
		break;
		case 0xe7:
		device->cname = "GK107";
		@@ -88,6 +91,8 @@ nve0_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_SW ] = &nvc0_software_oclass;
		device->oclass[NVDEV_ENGINE_GR ] = &nve0_graph_oclass;
		device->oclass[NVDEV_ENGINE_DISP ] = &nvd0_disp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
		device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
		break;
		default:
		nv_fatal(device, "unknown Kepler chipset\n");