Commit 4fe85b0c authored by Nishanth Menon's avatar Nishanth Menon Committed by Santosh Shilimkar
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ARM: dts: keystone-k2l-clocks: Add missing unit name to clock nodes that have regs



Add the control register as the base for the clock nodes which are
missing them. This squashes some 22 warnings of the effect when built
with W=1.

Reported-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@oracle.com>
parent 95d8b41c
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+22 −22
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ ddr3apllclk: ddr3apllclk@2620360 {
		reg-names = "control";
	};

	clkdfeiqnsys: clkdfeiqnsys {
	clkdfeiqnsys: clkdfeiqnsys@2350004 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk12>;
@@ -51,7 +51,7 @@ clkdfeiqnsys: clkdfeiqnsys {
		domain-id = <0>;
	};

	clkpcie1: clkpcie1 {
	clkpcie1: clkpcie1@235002c {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk12>;
@@ -61,7 +61,7 @@ clkpcie1: clkpcie1 {
		domain-id = <4>;
	};

	clkgem1: clkgem1 {
	clkgem1: clkgem1@2350040 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk1>;
@@ -71,7 +71,7 @@ clkgem1: clkgem1 {
		domain-id = <9>;
	};

	clkgem2: clkgem2 {
	clkgem2: clkgem2@2350044 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk1>;
@@ -81,7 +81,7 @@ clkgem2: clkgem2 {
		domain-id = <10>;
	};

	clkgem3: clkgem3 {
	clkgem3: clkgem3@2350048 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk1>;
@@ -91,7 +91,7 @@ clkgem3: clkgem3 {
		domain-id = <11>;
	};

	clktac: clktac {
	clktac: clktac@2350064 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -101,7 +101,7 @@ clktac: clktac {
		domain-id = <17>;
	};

	clkrac: clkrac {
	clkrac: clkrac@2350068 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -111,7 +111,7 @@ clkrac: clkrac {
		domain-id = <17>;
	};

	clkdfepd0: clkdfepd0 {
	clkdfepd0: clkdfepd0@235006c {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -121,7 +121,7 @@ clkdfepd0: clkdfepd0 {
		domain-id = <18>;
	};

	clkfftc0: clkfftc0 {
	clkfftc0: clkfftc0@2350070 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -131,7 +131,7 @@ clkfftc0: clkfftc0 {
		domain-id = <19>;
	};

	clkosr: clkosr {
	clkosr: clkosr@2350088 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -141,7 +141,7 @@ clkosr: clkosr {
		domain-id = <21>;
	};

	clktcp3d0: clktcp3d0 {
	clktcp3d0: clktcp3d0@235008c {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -151,7 +151,7 @@ clktcp3d0: clktcp3d0 {
		domain-id = <22>;
	};

	clktcp3d1: clktcp3d1 {
	clktcp3d1: clktcp3d1@2350094 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -161,7 +161,7 @@ clktcp3d1: clktcp3d1 {
		domain-id = <23>;
	};

	clkvcp0: clkvcp0 {
	clkvcp0: clkvcp0@235009c {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -171,7 +171,7 @@ clkvcp0: clkvcp0 {
		domain-id = <24>;
	};

	clkvcp1: clkvcp1 {
	clkvcp1: clkvcp1@23500a0 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -181,7 +181,7 @@ clkvcp1: clkvcp1 {
		domain-id = <24>;
	};

	clkvcp2: clkvcp2 {
	clkvcp2: clkvcp2@23500a4 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -191,7 +191,7 @@ clkvcp2: clkvcp2 {
		domain-id = <24>;
	};

	clkvcp3: clkvcp3 {
	clkvcp3: clkvcp3@23500a8 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -201,7 +201,7 @@ clkvcp3: clkvcp3 {
		domain-id = <24>;
	};

	clkbcp: clkbcp {
	clkbcp: clkbcp@23500bc {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -211,7 +211,7 @@ clkbcp: clkbcp {
		domain-id = <26>;
	};

	clkdfepd1: clkdfepd1 {
	clkdfepd1: clkdfepd1@23500c0 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -221,7 +221,7 @@ clkdfepd1: clkdfepd1 {
		domain-id = <27>;
	};

	clkfftc1: clkfftc1 {
	clkfftc1: clkfftc1@23500c4 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -231,7 +231,7 @@ clkfftc1: clkfftc1 {
		domain-id = <28>;
	};

	clkiqnail: clkiqnail {
	clkiqnail: clkiqnail@23500c8 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
@@ -241,7 +241,7 @@ clkiqnail: clkiqnail {
		domain-id = <29>;
	};

	clkuart2: clkuart2 {
	clkuart2: clkuart2@2350000 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&clkmodrst0>;
@@ -251,7 +251,7 @@ clkuart2: clkuart2 {
		domain-id = <0>;
	};

	clkuart3: clkuart3 {
	clkuart3: clkuart3@2350000 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&clkmodrst0>;