Loading drivers/staging/vt6655/baseband.c +14 −6 Original line number Diff line number Diff line Loading @@ -36,8 +36,10 @@ * Revision History: * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support. * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCalculateParameter(). * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init(). * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and * BBvCalculateParameter(). * cancel the setting of MAC_REG_SOFTPWRCTL on * BBbVT3253Init(). * Add the comments. * 09-01-2003 Bryan YC Fan: RF & BB tables updated. * Modified BBvLoopbackOn & BBvLoopbackOff(). Loading Loading @@ -777,7 +779,8 @@ static const unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = { #define CB_VT3253B0_AGC_FOR_RFMD2959 195 /* For RFMD2959 */ static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { {0xF0, 0x00}, {0xF1, 0x3E}, {0xF0, 0x80}, Loading Loading @@ -977,7 +980,8 @@ static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = #define CB_VT3253B0_INIT_FOR_AIROHA2230 256 /* For AIROHA */ static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, Loading Loading @@ -2160,9 +2164,13 @@ bool BBbVT3253Init(struct vnt_private *priv) /* {{ RobertYu:20050223, request by JerryChung */ /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /* Init ANT B select,TX Config CR09 = 0x61->0x45, * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ /* Select VC1/VC2, CR215 = 0x02->0x06 */ bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06); Loading drivers/staging/vt6655/baseband.h +4 −2 Original line number Diff line number Diff line Loading @@ -77,8 +77,10 @@ BBuGetFrameTime( void vnt_get_phy_field(struct vnt_private *, u32 frame_length, u16 tx_rate, u8 pkt_type, struct vnt_phy_field *); bool BBbReadEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char *pbyData); bool BBbWriteEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char byData); bool BBbReadEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char *pbyData); bool BBbWriteEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char byData); void BBvSetShortSlotTime(struct vnt_private *); void BBvSetVGAGainOffset(struct vnt_private *, unsigned char byData); Loading drivers/staging/vt6655/card.c +64 −31 Original line number Diff line number Diff line Loading @@ -336,7 +336,8 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) } if (priv->byCWMaxMin != byCWMaxMin) { priv->byCWMaxMin = byCWMaxMin; VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0, priv->byCWMaxMin); VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0, priv->byCWMaxMin); } priv->byPacketType = CARDbyGetPktType(priv); Loading Loading @@ -373,9 +374,12 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp, local_tsf); /* adjust TSF, HW's TSF add TSF Offset reg */ VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, (u32)qwTSFOffset); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, (u32)(qwTSFOffset >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, (u32)qwTSFOffset); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, (u32)(qwTSFOffset >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN); } return true; } Loading Loading @@ -407,7 +411,8 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv, priv->wBeaconInterval = wBeaconInterval; /* Set NextTBTT */ VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT); VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32)); VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); return true; Loading @@ -433,15 +438,19 @@ bool CARDbRadioPowerOff(struct vnt_private *priv) switch (priv->byRFType) { case RF_RFMD2959: MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); break; case RF_AIROHA: case RF_AL2230S: case RF_AIROHA7230: MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE2); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE2); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); break; } Loading @@ -451,7 +460,8 @@ bool CARDbRadioPowerOff(struct vnt_private *priv) priv->bRadioOff = true; pr_debug("chester power off\n"); MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ return bResult; } Loading Loading @@ -488,21 +498,24 @@ bool CARDbRadioPowerOn(struct vnt_private *priv) switch (priv->byRFType) { case RF_RFMD2959: MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); break; case RF_AIROHA: case RF_AL2230S: case RF_AIROHA7230: MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3)); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3)); break; } priv->bRadioOff = false; pr_debug("chester power on\n"); MACvRegBitsOff(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ MACvRegBitsOff(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ return bResult; } Loading Loading @@ -717,55 +730,72 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type) bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_9 */ s_vCalculateOFDMRParameter(RATE_9M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_12 */ s_vCalculateOFDMRParameter(RATE_12M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_18 */ s_vCalculateOFDMRParameter(RATE_18M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_24 */ s_vCalculateOFDMRParameter(RATE_24M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_36 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_36M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_36M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_48 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_48M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_48M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_54 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_54M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_72 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_54M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72, MAKEWORD(byTxRate, byRsvTime)); /* Set to Page0 */ MACvSelectPage0(priv->PortOffset); Loading Loading @@ -830,7 +860,8 @@ unsigned char CARDbyGetPktType(struct vnt_private *priv) * * Return Value: none */ void CARDvSetLoopbackMode(struct vnt_private *priv, unsigned short wLoopbackMode) void CARDvSetLoopbackMode(struct vnt_private *priv, unsigned short wLoopbackMode) { switch (wLoopbackMode) { case CARD_LB_NONE: Loading Loading @@ -965,7 +996,8 @@ u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval) * * Return Value: none */ void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInterval) void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInterval) { void __iomem *dwIoBase = priv->PortOffset; u64 qwNextTBTT = 0; Loading Loading @@ -993,7 +1025,8 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInter * * Return Value: none */ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, unsigned short wBeaconInterval) void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, unsigned short wBeaconInterval) { void __iomem *dwIoBase = priv->PortOffset; Loading drivers/staging/vt6655/card.h +6 −3 Original line number Diff line number Diff line Loading @@ -38,7 +38,8 @@ * LOBYTE is MAC LB mode, HIBYTE is MII LB mode */ #define CARD_LB_NONE MAKEWORD(MAC_LB_NONE, 0) #define CARD_LB_MAC MAKEWORD(MAC_LB_INTERNAL, 0) /* PHY must ISO, avoid MAC loopback packet go out */ /* PHY must ISO, avoid MAC loopback packet go out */ #define CARD_LB_MAC MAKEWORD(MAC_LB_INTERNAL, 0) #define CARD_LB_PHY MAKEWORD(MAC_LB_EXT, 0) #define DEFAULT_MSDU_LIFETIME 512 /* ms */ Loading Loading @@ -71,8 +72,10 @@ void CARDvUpdateBasicTopRate(struct vnt_private *); bool CARDbIsOFDMinBasicRate(struct vnt_private *); void CARDvSetLoopbackMode(struct vnt_private *, unsigned short wLoopbackMode); bool CARDbSoftwareReset(struct vnt_private *); void CARDvSetFirstNextTBTT(struct vnt_private *, unsigned short wBeaconInterval); void CARDvUpdateNextTBTT(struct vnt_private *, u64 qwTSF, unsigned short wBeaconInterval); void CARDvSetFirstNextTBTT(struct vnt_private *, unsigned short wBeaconInterval); void CARDvUpdateNextTBTT(struct vnt_private *, u64 qwTSF, unsigned short wBeaconInterval); bool CARDbGetCurrentTSF(struct vnt_private *, u64 *pqwCurrTSF); u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval); u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2); Loading drivers/staging/vt6655/desc.h +2 −1 Original line number Diff line number Diff line Loading @@ -157,7 +157,8 @@ /* TD_INFO flags control bit */ #define TD_FLAGS_NETIF_SKB 0x01 /* check if need release skb */ #define TD_FLAGS_PRIV_SKB 0x02 /* check if called from private skb (hostap) */ /* check if called from private skb (hostap) */ #define TD_FLAGS_PRIV_SKB 0x02 #define TD_FLAGS_PS_RETRY 0x04 /* check if PS STA frame re-transmit */ /* Loading Loading
drivers/staging/vt6655/baseband.c +14 −6 Original line number Diff line number Diff line Loading @@ -36,8 +36,10 @@ * Revision History: * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support. * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCalculateParameter(). * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init(). * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and * BBvCalculateParameter(). * cancel the setting of MAC_REG_SOFTPWRCTL on * BBbVT3253Init(). * Add the comments. * 09-01-2003 Bryan YC Fan: RF & BB tables updated. * Modified BBvLoopbackOn & BBvLoopbackOff(). Loading Loading @@ -777,7 +779,8 @@ static const unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = { #define CB_VT3253B0_AGC_FOR_RFMD2959 195 /* For RFMD2959 */ static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { {0xF0, 0x00}, {0xF1, 0x3E}, {0xF0, 0x80}, Loading Loading @@ -977,7 +980,8 @@ static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = #define CB_VT3253B0_INIT_FOR_AIROHA2230 256 /* For AIROHA */ static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, Loading Loading @@ -2160,9 +2164,13 @@ bool BBbVT3253Init(struct vnt_private *priv) /* {{ RobertYu:20050223, request by JerryChung */ /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /* Init ANT B select,TX Config CR09 = 0x61->0x45, * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /* Init ANT B select,RX Config CR10 = 0x28->0x2A, * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ /* Select VC1/VC2, CR215 = 0x02->0x06 */ bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06); Loading
drivers/staging/vt6655/baseband.h +4 −2 Original line number Diff line number Diff line Loading @@ -77,8 +77,10 @@ BBuGetFrameTime( void vnt_get_phy_field(struct vnt_private *, u32 frame_length, u16 tx_rate, u8 pkt_type, struct vnt_phy_field *); bool BBbReadEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char *pbyData); bool BBbWriteEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char byData); bool BBbReadEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char *pbyData); bool BBbWriteEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char byData); void BBvSetShortSlotTime(struct vnt_private *); void BBvSetVGAGainOffset(struct vnt_private *, unsigned char byData); Loading
drivers/staging/vt6655/card.c +64 −31 Original line number Diff line number Diff line Loading @@ -336,7 +336,8 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) } if (priv->byCWMaxMin != byCWMaxMin) { priv->byCWMaxMin = byCWMaxMin; VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0, priv->byCWMaxMin); VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0, priv->byCWMaxMin); } priv->byPacketType = CARDbyGetPktType(priv); Loading Loading @@ -373,9 +374,12 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp, local_tsf); /* adjust TSF, HW's TSF add TSF Offset reg */ VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, (u32)qwTSFOffset); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, (u32)(qwTSFOffset >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, (u32)qwTSFOffset); VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, (u32)(qwTSFOffset >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN); } return true; } Loading Loading @@ -407,7 +411,8 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv, priv->wBeaconInterval = wBeaconInterval; /* Set NextTBTT */ VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT); VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32)); VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32)); MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); return true; Loading @@ -433,15 +438,19 @@ bool CARDbRadioPowerOff(struct vnt_private *priv) switch (priv->byRFType) { case RF_RFMD2959: MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); break; case RF_AIROHA: case RF_AL2230S: case RF_AIROHA7230: MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE2); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE2); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); break; } Loading @@ -451,7 +460,8 @@ bool CARDbRadioPowerOff(struct vnt_private *priv) priv->bRadioOff = true; pr_debug("chester power off\n"); MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ return bResult; } Loading Loading @@ -488,21 +498,24 @@ bool CARDbRadioPowerOn(struct vnt_private *priv) switch (priv->byRFType) { case RF_RFMD2959: MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE1); break; case RF_AIROHA: case RF_AL2230S: case RF_AIROHA7230: MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3)); MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3)); break; } priv->bRadioOff = false; pr_debug("chester power on\n"); MACvRegBitsOff(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ MACvRegBitsOff(priv->PortOffset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */ return bResult; } Loading Loading @@ -717,55 +730,72 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type) bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_9 */ s_vCalculateOFDMRParameter(RATE_9M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_12 */ s_vCalculateOFDMRParameter(RATE_12M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_18 */ s_vCalculateOFDMRParameter(RATE_18M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_24 */ s_vCalculateOFDMRParameter(RATE_24M, bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_36 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_36M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_36M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_48 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_48M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_48M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_54 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_54M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54, MAKEWORD(byTxRate, byRsvTime)); /* RSPINF_a_72 */ s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate( (void *)priv, RATE_54M), bb_type, &byTxRate, &byRsvTime); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72, MAKEWORD(byTxRate, byRsvTime)); VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72, MAKEWORD(byTxRate, byRsvTime)); /* Set to Page0 */ MACvSelectPage0(priv->PortOffset); Loading Loading @@ -830,7 +860,8 @@ unsigned char CARDbyGetPktType(struct vnt_private *priv) * * Return Value: none */ void CARDvSetLoopbackMode(struct vnt_private *priv, unsigned short wLoopbackMode) void CARDvSetLoopbackMode(struct vnt_private *priv, unsigned short wLoopbackMode) { switch (wLoopbackMode) { case CARD_LB_NONE: Loading Loading @@ -965,7 +996,8 @@ u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval) * * Return Value: none */ void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInterval) void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInterval) { void __iomem *dwIoBase = priv->PortOffset; u64 qwNextTBTT = 0; Loading Loading @@ -993,7 +1025,8 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv, unsigned short wBeaconInter * * Return Value: none */ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, unsigned short wBeaconInterval) void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, unsigned short wBeaconInterval) { void __iomem *dwIoBase = priv->PortOffset; Loading
drivers/staging/vt6655/card.h +6 −3 Original line number Diff line number Diff line Loading @@ -38,7 +38,8 @@ * LOBYTE is MAC LB mode, HIBYTE is MII LB mode */ #define CARD_LB_NONE MAKEWORD(MAC_LB_NONE, 0) #define CARD_LB_MAC MAKEWORD(MAC_LB_INTERNAL, 0) /* PHY must ISO, avoid MAC loopback packet go out */ /* PHY must ISO, avoid MAC loopback packet go out */ #define CARD_LB_MAC MAKEWORD(MAC_LB_INTERNAL, 0) #define CARD_LB_PHY MAKEWORD(MAC_LB_EXT, 0) #define DEFAULT_MSDU_LIFETIME 512 /* ms */ Loading Loading @@ -71,8 +72,10 @@ void CARDvUpdateBasicTopRate(struct vnt_private *); bool CARDbIsOFDMinBasicRate(struct vnt_private *); void CARDvSetLoopbackMode(struct vnt_private *, unsigned short wLoopbackMode); bool CARDbSoftwareReset(struct vnt_private *); void CARDvSetFirstNextTBTT(struct vnt_private *, unsigned short wBeaconInterval); void CARDvUpdateNextTBTT(struct vnt_private *, u64 qwTSF, unsigned short wBeaconInterval); void CARDvSetFirstNextTBTT(struct vnt_private *, unsigned short wBeaconInterval); void CARDvUpdateNextTBTT(struct vnt_private *, u64 qwTSF, unsigned short wBeaconInterval); bool CARDbGetCurrentTSF(struct vnt_private *, u64 *pqwCurrTSF); u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval); u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2); Loading
drivers/staging/vt6655/desc.h +2 −1 Original line number Diff line number Diff line Loading @@ -157,7 +157,8 @@ /* TD_INFO flags control bit */ #define TD_FLAGS_NETIF_SKB 0x01 /* check if need release skb */ #define TD_FLAGS_PRIV_SKB 0x02 /* check if called from private skb (hostap) */ /* check if called from private skb (hostap) */ #define TD_FLAGS_PRIV_SKB 0x02 #define TD_FLAGS_PS_RETRY 0x04 /* check if PS STA frame re-transmit */ /* Loading