Commit 5186a6cc authored by Zenghui Yu's avatar Zenghui Yu Committed by Marc Zyngier
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irqchip/gic-v3-its: Rename VPENDBASER/VPROPBASER accessors 



V{PEND,PROP}BASER registers are actually located in VLPI_base frame
of the *redistributor*. Rename their accessors to reflect this fact.

No functional changes.

Signed-off-by: default avatarZenghui Yu <yuzenghui@huawei.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200206075711.1275-7-yuzenghui@huawei.com
parent b4635325

arch/arm/include/asm/arch_gicv3.h

+6 −6
Original line number Original line Diff line number Diff line
@@ -326,16 +326,16 @@ static inline u64 __gic_readq_nonatomic(const volatile void __iomem *addr) 
#define gits_write_cwriter(v, c)	__gic_writeq_nonatomic(v, c)

#define gits_write_cwriter(v, c)	__gic_writeq_nonatomic(v, c)





/*

/*

 * GITS_VPROPBASER - hi and lo bits may be accessed independently.

 * GICR_VPROPBASER - hi and lo bits may be accessed independently.

 */

 */

#define gits_read_vpropbaser(c)		__gic_readq_nonatomic(c)

#define gicr_read_vpropbaser(c)		__gic_readq_nonatomic(c)

#define gits_write_vpropbaser(v, c)	__gic_writeq_nonatomic(v, c)

#define gicr_write_vpropbaser(v, c)	__gic_writeq_nonatomic(v, c)





/*

/*

 * GITS_VPENDBASER - the Valid bit must be cleared before changing

 * GICR_VPENDBASER - the Valid bit must be cleared before changing

 * anything else.

 * anything else.

 */

 */

static inline void gits_write_vpendbaser(u64 val, void __iomem *addr)

static inline void gicr_write_vpendbaser(u64 val, void __iomem *addr)

{

{

	u32 tmp;

	u32 tmp;
@@ -352,7 +352,7 @@ static inline void gits_write_vpendbaser(u64 val, void __iomem *addr) 
	__gic_writeq_nonatomic(val, addr);

	__gic_writeq_nonatomic(val, addr);

}

}





#define gits_read_vpendbaser(c)		__gic_readq_nonatomic(c)

#define gicr_read_vpendbaser(c)		__gic_readq_nonatomic(c)





static inline bool gic_prio_masking_enabled(void)

static inline bool gic_prio_masking_enabled(void)

{

{

arch/arm64/include/asm/arch_gicv3.h

+4 −4
Original line number Original line Diff line number Diff line
@@ -140,11 +140,11 @@ static inline u32 gic_read_rpr(void) 
#define gicr_write_pendbaser(v, c)	writeq_relaxed(v, c)

#define gicr_write_pendbaser(v, c)	writeq_relaxed(v, c)

#define gicr_read_pendbaser(c)		readq_relaxed(c)

#define gicr_read_pendbaser(c)		readq_relaxed(c)





#define gits_write_vpropbaser(v, c)	writeq_relaxed(v, c)

#define gicr_write_vpropbaser(v, c)	writeq_relaxed(v, c)

#define gits_read_vpropbaser(c)		readq_relaxed(c)

#define gicr_read_vpropbaser(c)		readq_relaxed(c)





#define gits_write_vpendbaser(v, c)	writeq_relaxed(v, c)

#define gicr_write_vpendbaser(v, c)	writeq_relaxed(v, c)

#define gits_read_vpendbaser(c)		readq_relaxed(c)

#define gicr_read_vpendbaser(c)		readq_relaxed(c)





static inline bool gic_prio_masking_enabled(void)

static inline bool gic_prio_masking_enabled(void)

{

{

drivers/irqchip/irq-gic-v3-its.c

+14 −14
Original line number Original line Diff line number Diff line
@@ -2429,7 +2429,7 @@ static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 
		 * ours wrt CommonLPIAff. Let's use its own VPROPBASER.

		 * ours wrt CommonLPIAff. Let's use its own VPROPBASER.

		 * Make sure we don't write the Z bit in that case.

		 * Make sure we don't write the Z bit in that case.

		 */

		 */

		val = gits_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER);

		val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER);

		val &= ~GICR_VPROPBASER_4_1_Z;

		val &= ~GICR_VPROPBASER_4_1_Z;





		gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base;

		gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base;
@@ -2452,7 +2452,7 @@ static bool allocate_vpe_l2_table(int cpu, u32 id) 
	if (!gic_rdists->has_rvpeid)

	if (!gic_rdists->has_rvpeid)

		return true;

		return true;





	val  = gits_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER);

	val  = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER);





	esz  = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1;

	esz  = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1;

	gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val);

	gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val);
@@ -2524,8 +2524,8 @@ static int allocate_vpe_l1_table(void) 
	 * effect of making sure no doorbell will be generated and we can

	 * effect of making sure no doorbell will be generated and we can

	 * then safely clear VPROPBASER.Valid.

	 * then safely clear VPROPBASER.Valid.

	 */

	 */

	if (gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid)

	if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid)

		gits_write_vpendbaser(GICR_VPENDBASER_PendingLast,

		gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast,

				      vlpi_base + GICR_VPENDBASER);

				      vlpi_base + GICR_VPENDBASER);





	/*

	/*
@@ -2548,8 +2548,8 @@ static int allocate_vpe_l1_table(void) 




	/* First probe the page size */

	/* First probe the page size */

	val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K);

	val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K);

	gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

	gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

	val = gits_read_vpropbaser(vlpi_base + GICR_VPROPBASER);

	val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER);

	gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val);

	gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val);

	esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val);

	esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val);
@@ -2620,7 +2620,7 @@ static int allocate_vpe_l1_table(void) 
	val |= GICR_VPROPBASER_4_1_VALID;

	val |= GICR_VPROPBASER_4_1_VALID;





out:

out:

	gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

	gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

	cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask);

	cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask);





	pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n",

	pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n",
@@ -2727,14 +2727,14 @@ static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 
	bool clean;

	bool clean;

	u64 val;

	u64 val;





	val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER);

	val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER);

	val &= ~GICR_VPENDBASER_Valid;

	val &= ~GICR_VPENDBASER_Valid;

	val &= ~clr;

	val &= ~clr;

	val |= set;

	val |= set;

	gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);

	gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);





	do {

	do {

		val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER);

		val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER);

		clean = !(val & GICR_VPENDBASER_Dirty);

		clean = !(val & GICR_VPENDBASER_Dirty);

		if (!clean) {

		if (!clean) {

			count--;

			count--;
@@ -2849,7 +2849,7 @@ static void its_cpu_init_lpis(void) 
		val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK;

		val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK;

		pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n",

		pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n",

			smp_processor_id(), val);

			smp_processor_id(), val);

		gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

		gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);





		/*

		/*

		 * Also clear Valid bit of GICR_VPENDBASER, in case some

		 * Also clear Valid bit of GICR_VPENDBASER, in case some
@@ -3523,7 +3523,7 @@ static void its_vpe_schedule(struct its_vpe *vpe) 
	val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK;

	val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK;

	val |= GICR_VPROPBASER_RaWb;

	val |= GICR_VPROPBASER_RaWb;

	val |= GICR_VPROPBASER_InnerShareable;

	val |= GICR_VPROPBASER_InnerShareable;

	gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);

	gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER);





	val  = virt_to_phys(page_address(vpe->vpt_page)) &

	val  = virt_to_phys(page_address(vpe->vpt_page)) &

		GENMASK_ULL(51, 16);

		GENMASK_ULL(51, 16);
@@ -3541,7 +3541,7 @@ static void its_vpe_schedule(struct its_vpe *vpe) 
	val |= GICR_VPENDBASER_PendingLast;

	val |= GICR_VPENDBASER_PendingLast;

	val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0;

	val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0;

	val |= GICR_VPENDBASER_Valid;

	val |= GICR_VPENDBASER_Valid;

	gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);

	gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);

}

}





static void its_vpe_deschedule(struct its_vpe *vpe)

static void its_vpe_deschedule(struct its_vpe *vpe)
@@ -3741,7 +3741,7 @@ static void its_vpe_4_1_schedule(struct its_vpe *vpe, 
	val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0;

	val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0;

	val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);

	val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);





	gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);

	gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);

}

}





static void its_vpe_4_1_deschedule(struct its_vpe *vpe,

static void its_vpe_4_1_deschedule(struct its_vpe *vpe,