Commit 51b705af authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Daniel Lezcano
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dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support 



Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1594811350-14066-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
parent e2cb4980

Documentation/devicetree/bindings/timer/renesas,cmt.yaml

+2 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ properties: 
              - renesas,r8a774a1-cmt0     # 32-bit CMT0 on RZ/G2M

              - renesas,r8a774b1-cmt0     # 32-bit CMT0 on RZ/G2N

              - renesas,r8a774c0-cmt0     # 32-bit CMT0 on RZ/G2E

              - renesas,r8a774e1-cmt0     # 32-bit CMT0 on RZ/G2H

              - renesas,r8a7795-cmt0      # 32-bit CMT0 on R-Car H3

              - renesas,r8a7796-cmt0      # 32-bit CMT0 on R-Car M3-W

              - renesas,r8a77965-cmt0     # 32-bit CMT0 on R-Car M3-N
@@ -85,6 +86,7 @@ properties: 
              - renesas,r8a774a1-cmt1     # 48-bit CMT on RZ/G2M

              - renesas,r8a774b1-cmt1     # 48-bit CMT on RZ/G2N

              - renesas,r8a774c0-cmt1     # 48-bit CMT on RZ/G2E

              - renesas,r8a774e1-cmt1     # 48-bit CMT on RZ/G2H

              - renesas,r8a7795-cmt1      # 48-bit CMT on R-Car H3

              - renesas,r8a7796-cmt1      # 48-bit CMT on R-Car M3-W

              - renesas,r8a77965-cmt1     # 48-bit CMT on R-Car M3-N