Commit 52898511 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 updates from Catalin Marinas:
 "Apart from some new arm64 features and clean-ups, this also contains
  the core mmu_gather changes for tracking the levels of the page table
  being cleared and a minor update to the generic
  compat_sys_sigaltstack() introducing COMPAT_SIGMINSKSZ.

  Summary:

   - Core mmu_gather changes which allow tracking the levels of
     page-table being cleared together with the arm64 low-level flushing
     routines

   - Support for the new ARMv8.5 PSTATE.SSBS bit which can be used to
     mitigate Spectre-v4 dynamically without trapping to EL3 firmware

   - Introduce COMPAT_SIGMINSTKSZ for use in compat_sys_sigaltstack

   - Optimise emulation of MRS instructions to ID_* registers on ARMv8.4

   - Support for Common Not Private (CnP) translations allowing threads
     of the same CPU to share the TLB entries

   - Accelerated crc32 routines

   - Move swapper_pg_dir to the rodata section

   - Trap WFI instruction executed in user space

   - ARM erratum 1188874 workaround (arch_timer)

   - Miscellaneous fixes and clean-ups"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (78 commits)
  arm64: KVM: Guests can skip __install_bp_hardening_cb()s HYP work
  arm64: cpufeature: Trap CTR_EL0 access only where it is necessary
  arm64: cpufeature: Fix handling of CTR_EL0.IDC field
  arm64: cpufeature: ctr: Fix cpu capability check for late CPUs
  Documentation/arm64: HugeTLB page implementation
  arm64: mm: Use __pa_symbol() for set_swapper_pgd()
  arm64: Add silicon-errata.txt entry for ARM erratum 1188873
  Revert "arm64: uaccess: implement unsafe accessors"
  arm64: mm: Drop the unused cpu parameter
  MAINTAINERS: fix bad sdei paths
  arm64: mm: Use #ifdef for the __PAGETABLE_P?D_FOLDED defines
  arm64: Fix typo in a comment in arch/arm64/mm/kasan_init.c
  arm64: xen: Use existing helper to check interrupt status
  arm64: Use daifflag_restore after bp_hardening
  arm64: daifflags: Use irqflags functions for daifflags
  arm64: arch_timer: avoid unused function warning
  arm64: Trap WFI executed in userspace
  arm64: docs: Document SSBS HWCAP
  arm64: docs: Fix typos in ELF hwcaps
  arm64/kprobes: remove an extra semicolon in arch_prepare_kprobe
  ...
parents 84df9525 4debef55
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+8 −4
Original line number Diff line number Diff line
@@ -78,11 +78,11 @@ HWCAP_EVTSTRM

HWCAP_AES

    Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0001.
    Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.

HWCAP_PMULL

    Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0010.
    Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.

HWCAP_SHA1

@@ -153,7 +153,7 @@ HWCAP_ASIMDDP

HWCAP_SHA512

    Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0002.
    Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.

HWCAP_SVE

@@ -173,8 +173,12 @@ HWCAP_USCAT

HWCAP_ILRCPC

    Functionality implied by ID_AA64ISR1_EL1.LRCPC == 0b0002.
    Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.

HWCAP_FLAGM

    Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.

HWCAP_SSBS

    Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
+38 −0
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HugeTLBpage on ARM64
====================

Hugepage relies on making efficient use of TLBs to improve performance of
address translations. The benefit depends on both -

  - the size of hugepages
  - size of entries supported by the TLBs

The ARM64 port supports two flavours of hugepages.

1) Block mappings at the pud/pmd level
--------------------------------------

These are regular hugepages where a pmd or a pud page table entry points to a
block of memory. Regardless of the supported size of entries in TLB, block
mappings reduce the depth of page table walk needed to translate hugepage
addresses.

2) Using the Contiguous bit
---------------------------

The architecture provides a contiguous bit in the translation table entries
(D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a
contiguous set of entries that can be cached in a single TLB entry.

The contiguous bit is used in Linux to increase the mapping size at the pmd and
pte (last) level. The number of supported contiguous entries varies by page size
and level of the page table.


The following hugepage sizes are supported -

         CONT PTE    PMD    CONT PMD    PUD
         --------    ---    --------    ---
  4K:         64K     2M         32M     1G
  16K:         2M    32M          1G
  64K:         2M   512M         16G
+1 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ stable kernels.
| ARM            | Cortex-A72      | #853709         | N/A                         |
| ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |
| ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |
| ARM            | Cortex-A76      | #1188873        | ARM64_ERRATUM_1188873       |
| ARM            | MMU-500         | #841119,#826419 | N/A                         |
|                |                 |                 |                             |
| Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375        |
+15 −2
Original line number Diff line number Diff line
@@ -9712,6 +9712,19 @@ S: Maintained
F:	arch/arm/boot/dts/mmp*
F:	arch/arm/mach-mmp/

MMU GATHER AND TLB INVALIDATION
M:	Will Deacon <will.deacon@arm.com>
M:	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
M:	Andrew Morton <akpm@linux-foundation.org>
M:	Nick Piggin <npiggin@gmail.com>
M:	Peter Zijlstra <peterz@infradead.org>
L:	linux-arch@vger.kernel.org
L:	linux-mm@kvack.org
S:	Maintained
F:	arch/*/include/asm/tlb.h
F:	include/asm-generic/tlb.h
F:	mm/mmu_gather.c

MN88472 MEDIA DRIVER
M:	Antti Palosaari <crope@iki.fi>
L:	linux-media@vger.kernel.org
@@ -13502,8 +13515,8 @@ L: linux-arm-kernel@lists.infradead.org
S:	Maintained
F:	Documentation/devicetree/bindings/arm/firmware/sdei.txt
F:	drivers/firmware/arm_sdei.c
F:	include/linux/sdei.h
F:	include/uapi/linux/sdei.h
F:	include/linux/arm_sdei.h
F:	include/uapi/linux/arm_sdei.h

SOFTWARE RAID (Multiple Disks) SUPPORT
M:	Shaohua Li <shli@kernel.org>
+1 −0
Original line number Diff line number Diff line
@@ -161,6 +161,7 @@
#else
#define VTTBR_X		(5 - KVM_T0SZ)
#endif
#define VTTBR_CNP_BIT     _AC(1, UL)
#define VTTBR_BADDR_MASK  (((_AC(1, ULL) << (40 - VTTBR_X)) - 1) << VTTBR_X)
#define VTTBR_VMID_SHIFT  _AC(48, ULL)
#define VTTBR_VMID_MASK(size)	(_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT)
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