Commit 52a9df81 authored by John Clements's avatar John Clements Committed by Alex Deucher
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drm/amdgpu: enable ras eeprom on aldebaran 



enable ras eeprom loading by default on aldebaran

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 134d16d5

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

+7 −1
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#define EEPROM_I2C_TARGET_ADDR_ARCTURUS		0xA8

#define EEPROM_I2C_TARGET_ADDR_ARCTURUS_D342	0xA0

#define EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID   0xA0

#define EEPROM_I2C_TARGET_ADDR_ALDEBARAN        0xA0



/*

 * The 2 macros bellow represent the actual size in bytes that
@@ -64,7 +65,8 @@ static bool __is_ras_eeprom_supported(struct amdgpu_device *adev) 
{

	if ((adev->asic_type == CHIP_VEGA20) ||

	    (adev->asic_type == CHIP_ARCTURUS) ||

	    (adev->asic_type == CHIP_SIENNA_CICHLID))

	    (adev->asic_type == CHIP_SIENNA_CICHLID) ||

	    (adev->asic_type == CHIP_ALDEBARAN))

		return true;



	return false;
@@ -106,6 +108,10 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev, 
		*i2c_addr = EEPROM_I2C_TARGET_ADDR_SIENNA_CICHLID;

		break;



	case CHIP_ALDEBARAN:

		*i2c_addr = EEPROM_I2C_TARGET_ADDR_ALDEBARAN;

		break;



	default:

		return false;

	}