Commit 52cd5f9c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'ntb-5.11' of git://github.com/jonmason/ntb 

Pull NTB fixes from Jon Mason:
 "Bug fix for IDT NTB and Intel NTB LTR management support"

* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
  ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
  ntb: idt: fix error check in ntb_hw_idt.c
parents 33c148a4 75b6f648

drivers/ntb/hw/idt/ntb_hw_idt.c

+2 −2
Original line number Diff line number Diff line
@@ -2511,7 +2511,7 @@ static int idt_init_dbgfs(struct idt_ntb_dev *ndev) 
	/* If the top directory is not created then do nothing */

	if (IS_ERR_OR_NULL(dbgfs_topdir)) {

		dev_info(&ndev->ntb.pdev->dev, "Top DebugFS directory absent");

		return PTR_ERR(dbgfs_topdir);

		return PTR_ERR_OR_ZERO(dbgfs_topdir);

	}



	/* Create the info file node */
@@ -2756,7 +2756,7 @@ static int idt_pci_probe(struct pci_dev *pdev, 


	/* Allocate the memory for IDT NTB device data */

	ndev = idt_create_dev(pdev, id);

	if (IS_ERR_OR_NULL(ndev))

	if (IS_ERR(ndev))

		return PTR_ERR(ndev);



	/* Initialize the basic PCI subsystem of the device */

drivers/ntb/hw/intel/ntb_hw_gen1.h

+1 −0
Original line number Diff line number Diff line
@@ -141,6 +141,7 @@ 
#define NTB_HWERR_B2BDOORBELL_BIT14	BIT_ULL(2)

#define NTB_HWERR_MSIX_VECTOR32_BAD	BIT_ULL(3)

#define NTB_HWERR_BAR_ALIGN		BIT_ULL(4)

#define NTB_HWERR_LTR_BAD		BIT_ULL(5)



extern struct intel_b2b_addr xeon_b2b_usd_addr;

extern struct intel_b2b_addr xeon_b2b_dsd_addr;

drivers/ntb/hw/intel/ntb_hw_gen4.c

+26 −1
Original line number Diff line number Diff line
@@ -177,8 +177,10 @@ int gen4_init_dev(struct intel_ntb_dev *ndev) 


	ndev->reg = &gen4_reg;



	if (pdev_is_ICX(pdev))

	if (pdev_is_ICX(pdev)) {

		ndev->hwerr_flags |= NTB_HWERR_BAR_ALIGN;

		ndev->hwerr_flags |= NTB_HWERR_LTR_BAD;

	}



	ppd1 = ioread32(ndev->self_mmio + GEN4_PPD1_OFFSET);

	ndev->ntb.topo = gen4_ppd_topo(ndev, ppd1);
@@ -431,6 +433,25 @@ static int intel_ntb4_link_enable(struct ntb_dev *ntb, 
		dev_dbg(&ntb->pdev->dev,

				"ignoring max_width %d\n", max_width);



	if (!(ndev->hwerr_flags & NTB_HWERR_LTR_BAD)) {

		u32 ltr;



		/* Setup active snoop LTR values */

		ltr = NTB_LTR_ACTIVE_REQMNT | NTB_LTR_ACTIVE_VAL | NTB_LTR_ACTIVE_LATSCALE;

		/* Setup active non-snoop values */

		ltr = (ltr << NTB_LTR_NS_SHIFT) | ltr;

		iowrite32(ltr, ndev->self_mmio + GEN4_LTR_ACTIVE_OFFSET);



		/* Setup idle snoop LTR values */

		ltr = NTB_LTR_IDLE_VAL | NTB_LTR_IDLE_LATSCALE | NTB_LTR_IDLE_REQMNT;

		/* Setup idle non-snoop values */

		ltr = (ltr << NTB_LTR_NS_SHIFT) | ltr;

		iowrite32(ltr, ndev->self_mmio + GEN4_LTR_IDLE_OFFSET);



		/* setup PCIe LTR to active */

		iowrite8(NTB_LTR_SWSEL_ACTIVE, ndev->self_mmio + GEN4_LTR_SWSEL_OFFSET);

	}



	ntb_ctl = NTB_CTL_E2I_BAR23_SNOOP | NTB_CTL_I2E_BAR23_SNOOP;

	ntb_ctl |= NTB_CTL_E2I_BAR45_SNOOP | NTB_CTL_I2E_BAR45_SNOOP;

	iowrite32(ntb_ctl, ndev->self_mmio + ndev->reg->ntb_ctl);
@@ -476,6 +497,10 @@ static int intel_ntb4_link_disable(struct ntb_dev *ntb) 
	lnkctl |= GEN4_LINK_CTRL_LINK_DISABLE;

	iowrite16(lnkctl, ndev->self_mmio + GEN4_LINK_CTRL_OFFSET);



	/* set LTR to idle */

	if (!(ndev->hwerr_flags & NTB_HWERR_LTR_BAD))

		iowrite8(NTB_LTR_SWSEL_IDLE, ndev->self_mmio + GEN4_LTR_SWSEL_OFFSET);



	ndev->dev_up = 0;



	return 0;

drivers/ntb/hw/intel/ntb_hw_gen4.h

+15 −0
Original line number Diff line number Diff line
@@ -35,6 +35,9 @@ 
#define GEN4_IM_SPAD_SEM_OFFSET		0x00c0	/* SPAD hw semaphore */

#define GEN4_IM_SPAD_STICKY_OFFSET	0x00c4  /* sticky SPAD */

#define GEN4_IM_DOORBELL_OFFSET		0x0100  /* 0-31 doorbells */

#define GEN4_LTR_SWSEL_OFFSET		0x30ec

#define GEN4_LTR_ACTIVE_OFFSET		0x30f0

#define GEN4_LTR_IDLE_OFFSET		0x30f4

#define GEN4_EM_SPAD_OFFSET		0x8080

/* note, link status is now in MMIO and not config space for NTB */

#define GEN4_LINK_CTRL_OFFSET		0xb050
@@ -80,6 +83,18 @@ 


#define NTB_SJC_FORCEDETECT		0x000004



#define NTB_LTR_SWSEL_ACTIVE		0x0

#define NTB_LTR_SWSEL_IDLE		0x1



#define NTB_LTR_NS_SHIFT		16

#define NTB_LTR_ACTIVE_VAL		0x0000  /* 0 us */

#define NTB_LTR_ACTIVE_LATSCALE		0x0800  /* 1us scale */

#define NTB_LTR_ACTIVE_REQMNT		0x8000  /* snoop req enable */



#define NTB_LTR_IDLE_VAL		0x0258  /* 600 us */

#define NTB_LTR_IDLE_LATSCALE		0x0800  /* 1us scale */

#define NTB_LTR_IDLE_REQMNT		0x8000  /* snoop req enable */



ssize_t ndev_ntb4_debugfs_read(struct file *filp, char __user *ubuf,

				      size_t count, loff_t *offp);

int gen4_init_dev(struct intel_ntb_dev *ndev);