Commit 52d24087 authored by Vladimir Murzin's avatar Vladimir Murzin Committed by Ard Biesheuvel
Browse files

irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER



Rather then restructuring the ARMv7M entrly logic per TODO, just move
NVIC to GENERIC_IRQ_MULTI_HANDLER.

Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
Tested-by: default avatarMarc Zyngier <maz@kernel.org>
Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
parent 54f481a2
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+2 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
#define V7M_SCB_ICSR_PENDSVSET			(1 << 28)
#define V7M_SCB_ICSR_PENDSVCLR			(1 << 27)
#define V7M_SCB_ICSR_RETTOBASE			(1 << 11)
#define V7M_SCB_ICSR_VECTACTIVE			0x000001ff

#define V7M_SCB_VTOR			0x08

@@ -38,7 +39,7 @@
#define V7M_SCB_SHCSR_MEMFAULTENA		(1 << 16)

#define V7M_xPSR_FRAMEPTRALIGN			0x00000200
#define V7M_xPSR_EXCEPTIONNO			0x000001ff
#define V7M_xPSR_EXCEPTIONNO			V7M_SCB_ICSR_VECTACTIVE

/*
 * When branching to an address that has bits [31:28] == 0xf an exception return
+3 −7
Original line number Diff line number Diff line
@@ -39,14 +39,10 @@ __irq_entry:
	@
	@ Invoke the IRQ handler
	@
	mrs	r0, ipsr
	ldr	r1, =V7M_xPSR_EXCEPTIONNO
	and	r0, r1
	sub	r0, #16
	mov	r1, sp
	mov	r0, sp
	stmdb	sp!, {lr}
	@ routine called with r0 = irq number, r1 = struct pt_regs *
	bl	nvic_handle_irq
	@ routine called with r0 = struct pt_regs *
	bl	generic_handle_arch_irq

	pop	{lr}
	@
+1 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ config ARM_NVIC
	bool
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_MULTI_HANDLER

config ARM_VIC
	bool
+5 −17
Original line number Diff line number Diff line
@@ -37,25 +37,12 @@

static struct irq_domain *nvic_irq_domain;

static void __nvic_handle_irq(irq_hw_number_t hwirq)
static void __irq_entry nvic_handle_irq(struct pt_regs *regs)
{
	generic_handle_domain_irq(nvic_irq_domain, hwirq);
}
	unsigned long icsr = readl_relaxed(BASEADDR_V7M_SCB + V7M_SCB_ICSR);
	irq_hw_number_t hwirq = (icsr & V7M_SCB_ICSR_VECTACTIVE) - 16;

/*
 * TODO: restructure the ARMv7M entry logic so that this entry logic can live
 * in arch code.
 */
asmlinkage void __exception_irq_entry
nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
{
	struct pt_regs *old_regs;

	irq_enter();
	old_regs = set_irq_regs(regs);
	__nvic_handle_irq(hwirq);
	set_irq_regs(old_regs);
	irq_exit();
	generic_handle_domain_irq(nvic_irq_domain, hwirq);
}

static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
@@ -141,6 +128,7 @@ static int __init nvic_of_init(struct device_node *node,
	for (i = 0; i < irqs; i += 4)
		writel_relaxed(0, nvic_base + NVIC_IPR + i);

	set_handle_irq(nvic_handle_irq);
	return 0;
}
IRQCHIP_DECLARE(armv7m_nvic, "arm,armv7m-nvic", nvic_of_init);