Commit 5818cc37 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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ARM: dts: r8a7742: Add CMT SoC specific support 



Add CMT[01] support to r8a7742 SoC DT.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1590614320-30160-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 937c9ebd

arch/arm/boot/dts/r8a7742.dtsi

+32 −0
Original line number Diff line number Diff line
@@ -1368,6 +1368,38 @@ prr: chipid@ff000044 { 
			compatible = "renesas,prr";

			reg = <0 0xff000044 0 4>;

		};



		cmt0: timer@ffca0000 {

			compatible = "renesas,r8a7742-cmt0",

				     "renesas,rcar-gen2-cmt0";

			reg = <0 0xffca0000 0 0x1004>;

			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 124>;

			clock-names = "fck";

			power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;

			resets = <&cpg 124>;

			status = "disabled";

		};



		cmt1: timer@e6130000 {

			compatible = "renesas,r8a7742-cmt1",

				     "renesas,rcar-gen2-cmt1";

			reg = <0 0xe6130000 0 0x1004>;

			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 329>;

			clock-names = "fck";

			power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;

			resets = <&cpg 329>;

			status = "disabled";

		};

	};



	thermal-zones {