Loading drivers/gpu/drm/nouveau/nouveau_bios.c +10 −0 Original line number Diff line number Diff line Loading @@ -6776,6 +6776,16 @@ nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table, spin_unlock_bh(&bios->lock); } void nouveau_bios_init_exec(struct drm_device *dev, uint16_t table) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nvbios *bios = &dev_priv->vbios; struct init_exec iexec = { true, false }; parse_init_table(bios, table, &iexec); } static bool NVInitVBIOS(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; Loading drivers/gpu/drm/nouveau/nouveau_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -1071,6 +1071,7 @@ extern void nouveau_bios_takedown(struct drm_device *dev); extern int nouveau_run_vbios_init(struct drm_device *); extern void nouveau_bios_run_init_table(struct drm_device *, uint16_t table, struct dcb_entry *, int crtc); extern void nouveau_bios_init_exec(struct drm_device *, uint16_t table); extern struct dcb_gpio_entry *nouveau_bios_gpio_entry(struct drm_device *, enum dcb_gpio_tag); extern struct dcb_connector_table_entry * Loading drivers/gpu/drm/nouveau/nv40_pm.c +5 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ nv40_pm_clocks_set(struct drm_device *dev, void *pre_state) struct drm_nouveau_private *dev_priv = dev->dev_private; struct nv40_pm_state *info = pre_state; unsigned long flags; struct bit_entry M; u32 crtc_mask = 0; u8 sr1[2]; int i; Loading Loading @@ -310,6 +311,10 @@ nv40_pm_clocks_set(struct drm_device *dev, void *pre_state) nv_mask(dev, 0x100210, 0x80000000, 0x80000000); udelay(100); /* execute memory reset script from vbios */ if (!bit_table(dev, 'M', &M)) nouveau_bios_init_exec(dev, ROM16(M.data[0])); /* make sure we're in vblank (hopefully the same one as before), and * then re-enable crtc memory access */ Loading Loading
drivers/gpu/drm/nouveau/nouveau_bios.c +10 −0 Original line number Diff line number Diff line Loading @@ -6776,6 +6776,16 @@ nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table, spin_unlock_bh(&bios->lock); } void nouveau_bios_init_exec(struct drm_device *dev, uint16_t table) { struct drm_nouveau_private *dev_priv = dev->dev_private; struct nvbios *bios = &dev_priv->vbios; struct init_exec iexec = { true, false }; parse_init_table(bios, table, &iexec); } static bool NVInitVBIOS(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; Loading
drivers/gpu/drm/nouveau/nouveau_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -1071,6 +1071,7 @@ extern void nouveau_bios_takedown(struct drm_device *dev); extern int nouveau_run_vbios_init(struct drm_device *); extern void nouveau_bios_run_init_table(struct drm_device *, uint16_t table, struct dcb_entry *, int crtc); extern void nouveau_bios_init_exec(struct drm_device *, uint16_t table); extern struct dcb_gpio_entry *nouveau_bios_gpio_entry(struct drm_device *, enum dcb_gpio_tag); extern struct dcb_connector_table_entry * Loading
drivers/gpu/drm/nouveau/nv40_pm.c +5 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ nv40_pm_clocks_set(struct drm_device *dev, void *pre_state) struct drm_nouveau_private *dev_priv = dev->dev_private; struct nv40_pm_state *info = pre_state; unsigned long flags; struct bit_entry M; u32 crtc_mask = 0; u8 sr1[2]; int i; Loading Loading @@ -310,6 +311,10 @@ nv40_pm_clocks_set(struct drm_device *dev, void *pre_state) nv_mask(dev, 0x100210, 0x80000000, 0x80000000); udelay(100); /* execute memory reset script from vbios */ if (!bit_table(dev, 'M', &M)) nouveau_bios_init_exec(dev, ROM16(M.data[0])); /* make sure we're in vblank (hopefully the same one as before), and * then re-enable crtc memory access */ Loading