Commit 5cc1b66e authored by Boris Brezillon's avatar Boris Brezillon
Browse files

Merge tag 'spi-nor/for-4.20' of git://git.infradead.org/linux-mtd into mtd/next 

Core changes:
* Support non-uniform erase size
* Support controllers with limited TX fifo size

Driver changes:
* m25p80: Re-issue a WREN command after each write access
* cadence: Pass a proper dir value to dma_[un]map_single()
* fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B
  addressing opcodes are properly handled
* intel-spi: Add a new PCI entry for Ice Lake
parents 92e2921f 41fe2429

drivers/mtd/devices/m25p80.c

+8 −15
Original line number Diff line number Diff line
@@ -70,7 +70,6 @@ static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len, 
				   SPI_MEM_OP_ADDR(nor->addr_width, to, 1),

				   SPI_MEM_OP_NO_DUMMY,

				   SPI_MEM_OP_DATA_OUT(len, buf, 1));

	size_t remaining = len;

	int ret;



	/* get transfer protocols. */
@@ -81,22 +80,16 @@ static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len, 
	if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)

		op.addr.nbytes = 0;



	while (remaining) {

		op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;

	ret = spi_mem_adjust_op_size(flash->spimem, &op);

	if (ret)

		return ret;

	op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes;



	ret = spi_mem_exec_op(flash->spimem, &op);

	if (ret)

		return ret;



		op.addr.val += op.data.nbytes;

		remaining -= op.data.nbytes;

		op.data.buf.out += op.data.nbytes;

	}



	return len;

	return op.data.nbytes;

}



/*

drivers/mtd/spi-nor/cadence-quadspi.c

+2 −2
Original line number Diff line number Diff line
@@ -959,7 +959,7 @@ static int cqspi_direct_read_execute(struct spi_nor *nor, u_char *buf, 
		return 0;

	}



	dma_dst = dma_map_single(nor->dev, buf, len, DMA_DEV_TO_MEM);

	dma_dst = dma_map_single(nor->dev, buf, len, DMA_FROM_DEVICE);

	if (dma_mapping_error(nor->dev, dma_dst)) {

		dev_err(nor->dev, "dma mapping failed\n");

		return -ENOMEM;
@@ -994,7 +994,7 @@ static int cqspi_direct_read_execute(struct spi_nor *nor, u_char *buf, 
	}



err_unmap:

	dma_unmap_single(nor->dev, dma_dst, len, DMA_DEV_TO_MEM);

	dma_unmap_single(nor->dev, dma_dst, len, DMA_FROM_DEVICE);



	return 0;

}

drivers/mtd/spi-nor/fsl-quadspi.c

+11 −4
Original line number Diff line number Diff line
@@ -478,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) 
{

	switch (cmd) {

	case SPINOR_OP_READ_1_1_4:

	case SPINOR_OP_READ_1_1_4_4B:

		return SEQID_READ;

	case SPINOR_OP_WREN:

		return SEQID_WREN;
@@ -543,6 +544,9 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 cmd, unsigned int addr, int len) 


	/* trigger the LUT now */

	seqid = fsl_qspi_get_seqid(q, cmd);

	if (seqid < 0)

		return seqid;



	qspi_writel(q, (seqid << QUADSPI_IPCR_SEQID_SHIFT) | len,

			base + QUADSPI_IPCR);
@@ -671,7 +675,7 @@ static void fsl_qspi_set_map_addr(struct fsl_qspi *q) 
 * causes the controller to clear the buffer, and use the sequence pointed

 * by the QUADSPI_BFGENCR[SEQID] to initiate a read from the flash.

 */

static void fsl_qspi_init_ahb_read(struct fsl_qspi *q)

static int fsl_qspi_init_ahb_read(struct fsl_qspi *q)

{

	void __iomem *base = q->iobase;

	int seqid;
@@ -696,8 +700,13 @@ static void fsl_qspi_init_ahb_read(struct fsl_qspi *q) 


	/* Set the default lut sequence for AHB Read. */

	seqid = fsl_qspi_get_seqid(q, q->nor[0].read_opcode);

	if (seqid < 0)

		return seqid;



	qspi_writel(q, seqid << QUADSPI_BFGENCR_SEQID_SHIFT,

		q->iobase + QUADSPI_BFGENCR);



	return 0;

}



/* This function was used to prepare and enable QSPI clock */
@@ -805,9 +814,7 @@ static int fsl_qspi_nor_setup_last(struct fsl_qspi *q) 
	fsl_qspi_init_lut(q);



	/* Init for AHB read */

	fsl_qspi_init_ahb_read(q);



	return 0;

	return fsl_qspi_init_ahb_read(q);

}



static const struct of_device_id fsl_qspi_dt_ids[] = {

drivers/mtd/spi-nor/intel-spi-pci.c

+1 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ static void intel_spi_pci_remove(struct pci_dev *pdev) 
static const struct pci_device_id intel_spi_pci_ids[] = {

	{ PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },

	{ PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },

	{ PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info },

	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },

	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },

	{ },

drivers/mtd/spi-nor/spi-nor.c

+860 −65

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