Commit 5cf607cc authored by Chengming Gui's avatar Chengming Gui Committed by Alex Deucher
Browse files

drm/amdkfd: support beige_goby KFD 



Add KFD support for beige_goby
v2: fix asic name typo
v3: squash in updates (Alex)
v4: squash in needs_atomics fix (Alex)

Signed-off-by: default avatarChengming Gui <Jack.Gui@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0e5f4b09

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

+61 −0
Original line number Diff line number Diff line
@@ -689,6 +689,63 @@ static struct kfd_gpu_cache_info dimgrey_cavefish_cache_info[] = { 
	},

};



static struct kfd_gpu_cache_info beige_goby_cache_info[] = {

	{

		/* TCP L1 Cache per CU */

		.cache_size = 16,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_DATA_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 1,

	},

	{

		/* Scalar L1 Instruction Cache per SQC */

		.cache_size = 32,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_INST_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

	{

		/* Scalar L1 Data Cache per SQC */

		.cache_size = 16,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_DATA_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

	{

		/* GL1 Data Cache per SA */

		.cache_size = 128,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_DATA_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 8,

	},

	{

		/* L2 Data Cache per GPU (Total Tex Cache) */

		.cache_size = 1024,

		.cache_level = 2,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_DATA_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 8,

	},

	{

		/* L3 Data Cache per GPU */

		.cache_size = 16*1024,

		.cache_level = 3,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

				CRAT_CACHE_FLAGS_DATA_CACHE |

				CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 8,

	},

};



static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev,

		struct crat_subtype_computeunit *cu)

{
@@ -1322,6 +1379,10 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, 
		pcache_info = vangogh_cache_info;

		num_of_cache_types = ARRAY_SIZE(vangogh_cache_info);

		break;

	case CHIP_BEIGE_GOBY:

		pcache_info = beige_goby_cache_info;

		num_of_cache_types = ARRAY_SIZE(beige_goby_cache_info);

		break;

	default:

		return -EINVAL;

	}

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+19 −0
Original line number Diff line number Diff line
@@ -558,6 +558,24 @@ static const struct kfd_device_info dimgrey_cavefish_device_info = { 
	.num_sdma_queues_per_engine = 8,

};



static const struct kfd_device_info beige_goby_device_info = {

	.asic_family = CHIP_BEIGE_GOBY,

	.asic_name = "beige_goby",

	.max_pasid_bits = 16,

	.max_no_of_hqd  = 24,

	.doorbell_size  = 8,

	.ih_ring_entry_size = 8 * sizeof(uint32_t),

	.event_interrupt_class = &event_interrupt_class_v9,

	.num_of_watch_points = 4,

	.mqd_size_aligned = MQD_SIZE_ALIGNED,

	.needs_iommu_device = false,

	.supports_cwsr = true,

	.needs_pci_atomics = true,

	.num_sdma_engines = 1,

	.num_xgmi_sdma_engines = 0,

	.num_sdma_queues_per_engine = 8,

};





/* For each entry, [0] is regular and [1] is virtualisation device. */

static const struct kfd_device_info *kfd_supported_devices[][2] = {
@@ -586,6 +604,7 @@ static const struct kfd_device_info *kfd_supported_devices[][2] = { 
	[CHIP_NAVY_FLOUNDER] = {&navy_flounder_device_info, &navy_flounder_device_info},

	[CHIP_VANGOGH] = {&vangogh_device_info, NULL},

	[CHIP_DIMGREY_CAVEFISH] = {&dimgrey_cavefish_device_info, &dimgrey_cavefish_device_info},

	[CHIP_BEIGE_GOBY] = {&beige_goby_device_info, &beige_goby_device_info},

};



static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+1 −0
Original line number Diff line number Diff line
@@ -1936,6 +1936,7 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) 
	case CHIP_NAVY_FLOUNDER:

	case CHIP_VANGOGH:

	case CHIP_DIMGREY_CAVEFISH:

	case CHIP_BEIGE_GOBY:

		device_queue_manager_init_v10_navi10(&dqm->asic_ops);

		break;

	default:

drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c

+1 −0
Original line number Diff line number Diff line
@@ -424,6 +424,7 @@ int kfd_init_apertures(struct kfd_process *process) 
			case CHIP_NAVY_FLOUNDER:

			case CHIP_VANGOGH:

			case CHIP_DIMGREY_CAVEFISH:

			case CHIP_BEIGE_GOBY:

				kfd_init_apertures_v9(pdd, id);

				break;

			default:

drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c

+1 −0
Original line number Diff line number Diff line
@@ -249,6 +249,7 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm) 
	case CHIP_NAVY_FLOUNDER:

	case CHIP_VANGOGH:

	case CHIP_DIMGREY_CAVEFISH:

	case CHIP_BEIGE_GOBY:

		pm->pmf = &kfd_v9_pm_funcs;

		break;

	case CHIP_ALDEBARAN: