Commit 5d6cd200 authored by Shiwu Zhang's avatar Shiwu Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: add the accelerator pcie class



v2: add the base class id for accelerator (lijo)
v3: add the new pci class in amdgpu tree (hawking)

Signed-off-by: default avatarShiwu Zhang <shiwu.zhang@amd.com>
Acked-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 23105541
Loading
Loading
Loading
Loading
+5 −0
Original line number Diff line number Diff line
@@ -2041,6 +2041,11 @@ static const struct pci_device_id pciidlist[] = {
	  .class_mask = 0xffffff,
	  .driver_data = CHIP_IP_DISCOVERY },

	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
	  .class = AMD_ACCELERATOR_PROCESSING << 8,
	  .class_mask = 0xffffff,
	  .driver_data = CHIP_IP_DISCOVERY },

	{0, 0, 0}
};

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@


#define AMD_MAX_USEC_TIMEOUT		1000000  /* 1000 ms */
#define AMD_ACCELERATOR_PROCESSING	0x1200   /* hardcoded pci class */

/*
 * Chip flags